ST7FLITE29 simulator bug

Posted on May 30, 2005 at 04:50

I just discovered that the STVD7 3.1.1. simulator does not update

the WDGRF bit of the System Integrity Control/Status Register (SICSR)

whenever a watchdog timeout resets the ST7FLITE29.

According to the latest documentation (page 33 of ST7LITE2 datasheet

Rev. 3.0 - October 2004) and my tests on shipping silicon,

''[the bit #4 of SICSR] is set by hardware

(watchdog reset) and cleared by software

(writing zero) or an LVD Reset (to ensure

a stable cleared state of the WDGRF flag

when CPU starts).''

Regards,

EtaPhi

Posted on June 24, 2005 at 11:05

Thanks for reporting this bug.

It is present on Lite watchdogs (Lite1, Lite2, Dali, Lite3, L3).

Regards,

Robert