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M
Madhu_S
Associate
May 22, 2026
Question

STM32N6 Port P & O pinouts are not functioning

  • May 22, 2026
  • 2 replies
  • 72 views

Hello ST team,

we are trying to evaluate the simple GPIO pinouts on STM32N6 Nucelo & in our custom board,

we noticed that Port P & O pinouts are not functioning as expected. we just configured as simple GPIO output and tested the pin state always low. 
other GPIO ports look normal, but we will come to know when we do the complete testing.
 
We've cross checked this Port P &O functionality in the Nucleo EVK as well in custom board, but No luck, it is not working in both, could you please suggest, is there any special configurations required to make port P& O functional?

Regards,
Madhu S

2 replies

Andrew Neil
Andrew Neil
Super User
May 22, 2026

Maybe this helps: Nucleo H7S3L8: No GPIO output on ports O and P ?

A complex system that works is invariably found to have evolved from a simple system that worked.A complex system designed from scratch never works and cannot be patched up to make it work.
RomainR.
RomainR.
ST Employee
May 23, 2026

Hello @Madhu_S 

Refer to RM0486, section PWR register PWR_SVMCR3. GPIO ports GPIOO and GPIOP are in the VDDIO2 domain, and GPION is in the VDDIO3 domain. However, there is a default isolation used to disable VDDIO2 and VDDIO3.

Therefore, your code should enable the following bits in PWR_SVMCR3:

  • Bit 9 VDDIO3SV: VDDIO3 independent supply valid
  • Bit 8 VDDIO2SV: VDDIO2 independent supply valid

A CubeMX project can generate the required code if you use these GPIO ports with the following functions (typically in stm32n6xx_hal_msp.c.

Best regards,
Romain

void HAL_MspInit(void)
{

 /* USER CODE BEGIN MspInit 0 */

 /* USER CODE END MspInit 0 */

 /* System interrupt init*/

 HAL_PWREx_EnableVddIO2();
 HAL_PWREx_EnableVddIO3();

 /* USER CODE BEGIN MspInit 1 */

 /* USER CODE END MspInit 1 */
}

 

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