STM32 MCUs Embedded software

Hello everyone,I'm trying to configure the SAI and GPDMA peripherals on an STM32 to acquire audio from an I2S microphone. My goal is to capture a 32-bit, 2-channel audio stream at a 16 kHz sample rate, with the STM32 acting as the clock master. I've followed the steps below, but I'm running into two main issues:While the HAL_SAI_RxCpltCallback and HAL_SAI_RxHalfCpltCallback functions are being called, the acquisition buffer remains unchanged (full of zeros).I'm seeing a 16 kHz signal on all three I2S lines (SCK, FS, and SD), which is incorrect. The clock (SCK) should be much higher.Here's a summary of the steps I've taken:PLL4 Configuration: I've configured PLL4 to generate a 1.024 MHz clock (16 kHz * 64 = 1.024 MHz). This clock feeds into the IC7 peripheral.GPDMA1 Configuration: I've enabled the clock and interrupts for GPDMA1 Channel 0 and added a linked-list initialization.SAI1 Block B1 Configuration: I've set up the SAI handle for I2S standard, 32-bit data, 16 kHz audio frequency,

Hey all,I'm trying to get embedded Lua (https://eluaproject.net/) running on an STM32C0 MCU. The implementation has a Write Once Filesystem that uses flash and can be appended to but not modified.The issue is that the WOFS relies on being able to write bits in flash as 0xFF or 1s with the expectation that it will be able to write over them later to set them to 0s (obviously not vice versa) For instance an 8 byte (smallest size supported by this flash?) write to address A with data FF FF FF FF 01 23 45 67, then later another write to address A with data AA FF FF FF 01 23 45 67. I think this is used to set flags on old files, like "deleted", and also to deal with the fact that the FS is designed around 4 byte, not 8 byte alignment.This seems like it would be possible from a hardware perspective but HAL_FLASH_Program errors when I try it, is this something that is possible? Thank you! 

Hey,I tried to follow all the steps of this thread as good as possible. Still I have a faulty SAI Perpheral. The Problem is that the generatet FSYNC and BCK are too low. They are both also dependent on the PLL Frequency. For example if i set IC7 so that it has 12.288MHz the FSYNC is 2kHz (insted of 48kHz) and BCK is 512kHz (instead of 12.288 MHz).When i set IC7 to 192MHz FSYNC is 31.3kHz and BCK is about 8MHz. Also if I set any other clock channel than IC7 to feed the SAI1 Peripheral, then there won't be any FSYNC or BCK anymore.  The D-Cache is working and doesn't give me an error as i followed this post: https://community.st.com/t5/stm32-mcus-embedded-software/stm32n6-using-dcache-with-freertos-and-sai-gpdma-usage/m-p/850823/highlight/true#M69398I am running everything in Appli. Here are the settings:SAI Setting: GPDMA1 Setting: 

I am sending and receiving MQTT messages. My problem is that after normally working it could be that one ACK is not been sent out to the broker which prevents him to send anymore messages to my board.I recognized that by watching the packets on the bus with wireshark and also some debug prints. My app is running it could be for hours. I can send and receive messages for a long time. But on any circumstances one ACK is not been sent to the network and stalls the whole communication with the broker. What about watching the tx interrupt coming from the eth. Any more ideas where to debug this in more detail. Thanks in advance

I'm using an STM32U5A9J-DK and I've followed this guide step-by-step https://community.st.com/t5/stm32-mcus/how-to-redirect-the-printf-function-to-a-uart-for-debug-messages/ta-p/49865From the docs https://www.st.com/resource/en/user_manual/um2967-discovery-kits-with-stm32u5x9nj-mcus-stmicroelectronics.pdf I'm seeing that the virtual port is set to USART1, so I've set it up with CubeMX which generated/** * @brief USART1 Initialization Function * @PAram None * @retval None */ static void MX_USART1_UART_Init(void) { /* USER CODE BEGIN USART1_Init 0 */ /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; huart1.Init.BaudRate = 115200; huart1.Init.WordLength = UART_WORDLENGTH_7B; huart1.Init.StopBits = UART_STOPBITS_1; huart1.Init.Parity = UART_PARITY_NONE; huart1.Init.Mode = UART_MODE_TX_RX; huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; huart1.Init.OverSampling = UART_OV

Hi everyone,I am currently running the DCMIPP_Continuous mode example from STM32N6Cube firmware v1.2.0. However, I am getting stuck at the function call:HAL_result = HAL_RCC_OscConfig(&RCC_OscInitStruct);RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_NONE; RCC_OscInitStruct.PLL1.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL1.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL1.PLLM = 4; RCC_OscInitStruct.PLL1.PLLN = 75; RCC_OscInitStruct.PLL1.PLLFractional = 0; RCC_OscInitStruct.PLL1.PLLP1 = 1; RCC_OscInitStruct.PLL1.PLLP2 = 1; RCC_OscInitStruct.PLL2.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.PLL3.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.PLL4.PLLState = RCC_PLL_NONE; HAL_StatusTypeDef HAL_result; // Have a variable to catch the result HAL_result = HAL_RCC_OscConfig(&RCC_OscInitStruct); // Catch the result if (HAL_result != HAL_OK) { Error_Handler(); }After some debugging, I found that the function returns HAL_ERROR. Earlier, this code was working fine,

Good morning, I need to connect two h7a3zi-q board via uart (only one way required), but by only connecting tx1->rx2 the programs run but I get empty strings, and by also connecting the grounds of the two boards the tx program gives HardFault. I'm sure of the content of the msgs as I also send via uart3 to my pc and I have no problems.  Any tips? Thx

Hi,I'm going to use four different OpAmps in the STM32G474, namely OPAMP3, OPAMP4, OPAMP5, and OPAMP6.At this moment I try to initialize all four OpAmps. The first three work perfectly well, the initialization of OPAMP6 results in a problem. The State of OPAMP6 is HAL_OPAMP_STATE_CALIBBUSY. And, therefore result in an error.For the first three the State is '28', and initialize perfectly well.How can I fix this? What is causing this behavior?With kind regards,ErX

I'm using the STM32H562. I'm trying to start an ADC conversion using output compare on a specified channel during the middle of an up-down count of a timer.Timer used: TIM8 running at 250 MHz, generating a 20 kHz periodChannel: 4Timing: At the peak of the up-down countPeripheral configuration:In TIM8_CCMR2, OC3M is set to 0001 to activate the signal when the counter matches the compare value.In TIM8_CR2, both MMS and MMS2 are set to 0111 to use Channel 4 as the trigger output.For ADC1 and ADC2, the trigger source is set to TIM8 TRG2.Although TIM8 has been started, the HAL status of the ADC conversion remains at 0xFF.I would like to know if there is any configuration I might have overlooked, or if there is a way to detect the start of ADC conversion for debugging purposes, such as using an interrupt. Here are the initialization procedures for TIM and ADC:/** * @brief TIM8 Initialization Function * @PAram None * @retval None */ static void MX_TIM8_Init(void) { /* USER CODE BEG

All, My team is looking at designing a PCB around the STM32U5G9-DK2 development board and are running into some issues. The development board uses a flash memory IC "MX66LM1G45GXDI00" but the BSP example driver for the board only contains "MX66UW1G45G" information.https://github.com/STMicroelectronics/STM32CubeU5/tree/main/Projects/STM32U5G9J-DK2/Examples/BSP/Inc Is there a reason the development board only references this other flash memory IC in CubeIDE and if so will this driver still work for the development boards IC? Thank You, 

Hi everyone,We are using STM32H755ZIT6 with external QSPI Flash in memory-mapped mode.After long runtime, we see an issue where the RTOS event returns resource unavailable (-3) even though the UART buffer has received complete data. We suspect it might be related to QSPI, because our QSPI trace length is around 66 mm. Our question::backhand_index_pointing_right: If any data or byte is missed during QSPI (memory-mapped) read, can this cause the system to get stuck or RTOS events to fail? Anyone faced similar behavior or can confirm this possibility?

Hello everyone,I’m working on an STM32F103 microcontroller using CAN in polling mode (without FreeRTOS).From my testbench, I transmit 16 CAN messages cyclically every 100 ms.Each message has a unique CAN ID.My goal is to:Receive all 16 messages within the 100 ms cycle,Process each message and,Send back an acknowledgment (ACK) frame for each received message.However, when I send all 16 messages cyclically from the testbench,I’m receiving only 3 messages’ acknowledgments — the rest are missing.Can anyone help me out.

Hello,I am trying to take a log using my sdcard on my project.I am using FATFS that included in STM32CubeIDE but I got some issues, without FREERTOS everything works as expected and fine but when I enable the FREERTOS and it want's me to enable USE_NEWLIN_REENTRANT. When I enable it generates problem with FATFS USE_LFN(long file name) selection and normally it is Enable with dynamic working buffer on BSS. But the IDE wants me to change it and I change it for the STACK than I tried the HEAP and also tried for the disable option. But in both way my system got stuck in f_open function and returns FR_NOT_READY I searched online but I couldn't find the exact solution for this problem. When I searched I found examples for DMA option but I don't have the dma option in .ioc file you can see it in attachements.  I am trying to initialize my sdcard in main code and my function looks like this   FRESULT initialize_sd_card(void) { FRESULT res; /* FatFs function common res

The linkerscripts generated by the STM32CubeMX for STM32F767ZI appear to use the AXIM interface:/* Specify the memory areas */ MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K }But the default boot vector is set to address 0x0020 0000 which is a ITCM address:# gdb console > monitor stm32f7x options_read 0 stm32f2x user_options 0xFFC, boot_add0 0x0080, boot_add1 0x0040boot_add0 0x0080 indicates ITCM.When I move the boot vector by 128K, I have to set boot_add0 to 0x0088 (8*16K=128K) and set FLASH  ORIGIN in above linker script to 0x08020000. Otherwise it will not work. That is a bit confusing.Is the MCU really booting from ITCM?The binary code is not explicitly position-independent. I contains absolute jumps to addresses in the AXIM space because that is what LMA and VMA are configured to in the default linker scripts. Does my application only work by accident?Should LMA and VMA in the linker script be separated, i.e. V

STM32CubeIde 1.19.0STM32Cube_FW_N6_V1.2.0RTSP Client: FFPLAY I've been evaluating the VENC_RTSP_Server example for a little while as a starting point for a potential video streaming application. Unfortunately, the example does not produce a stable stream. The stream was unstable prior to FW v1.20 as well, but a new check and message was added in FW v1.20 (MSG: "Video Overflow - Skip Frame") that seems to point to the bottleneck being on the encoding side somewhere and not the network side. I'll detail some of the issues here. Some of these issues address quality problems and may or may not help this performance, but others do affect it. I'm also certainly open to the possibility that my analysis could be wrong in some cases as I haven't had much time working with this part and the STM32Cube tools.  File: Appli/Src/main.c Issue #1: A) The PLL2 configuration in SystemClock_Config() is invalid according to STM32CubeMX or at least it will not allow this configurati

I have a Flash Full test failed issue with the STM32F427 ClassB library V4.0.0 code in Keil project.The project is generated from the STM32F446RE-Nucleo examples. Attached please find my scatter file and the post-build command batch file. (I have tested the official CubeIDE project and it can pass the Flash Full test and also the runtime partial flash test.) Project.sctLR_IROM1 0x08000000 0x00080000 { ; load region size_region (512KB FLASH) ; Interrupt Vector Table and Program Code (FLASH) ; Full 512KB flash region ; Note: CRC area (0x0807FFFC-0x0807FFFF) should be excluded from flash test ER_IROM1 0x08000000 0x00080000 { ; load address = execution address (full 512KB) *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) .ANY (+XO) } ; RAM Memory Region (192KB) ; Backup buffer section (for STL) - 32 bytes (0x20), placed first in RAM, UNINIT (NOLOAD) backup_buffer_section 0x20000000 UNINIT 0x20 { * (backup_buffer_section) } ; Initialized data (loaded from FLAS

I configured FREERTOS on my STM32FT67ZI card with a USART3 device. I started the microROS agent on my PC but the connection is not created and it gives me this message: run micro_ros_agent micro_ros_agent serial --dev /dev/ttyACM2 -b 115200 [1762814038.235435] info | TermiosAgentLinux.cpp | init | running... | fd: 14 [1762814038.236035] info | Root.cpp | set_verbose_level | logger setup | verbose_level: 4 What could it be?If I search for the topic, it doesn't bring up any results.How can I tell if the problem is on the card or the PC? I'm connected to the ST-Link USB cable.

Hello,Need information about, does LPUART can wakeup? if the clock source is LSI (32Khz)?Because I have tried multiple examples to wakeup but it only works in debug mode but not in release mode.I have also work on optimization level, currently optimization is None for both debug and release.Thanks,Nitin

Hello all, I am doing some tests with a NUCLEO-U575ZI-Q Board and FreeRTOS. I have created a simple program based on a STM32 examples, the unit will go into EnterSTOP2Mode and wakes up when the button is pressed.This is the code I have on the main.c file:int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* Configure the System Power */ SystemPower_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ /* Init scheduler */ osKernelInitialize(); /* Call init function for freertos objects (in freertos.c) */ MX_FREERTOS_Init(); /* Start scheduler */ osKernelStart(); /*

Hi Everyone,I am working on the Project where STM32F407VET6 with External PHY. Configured the ETH and LWIP and I am able to get the IP address. Now I need implement the MQTT in the project. With MQTT command received some task will be performed by the STM MCU. Set up No RTOS used. Any Example of Ethernet MQTT will be Helpful. I think to use MQTT. Which library will be helpful.Thanks and regards,Mallikarjun

Hello everyone, for a few days I have been struggling with skipping and running the bootloader on stm32g474ret6 via usart.I have an STM, 12MHz crystal, and an FTDI chip on my own PCB, with RTS/CTS disconnected for now. After sending a command via USART, the control LED lights up, but the bootloader doesn't start. What am I doing wrong?#include <stdint.h> #include "stm32g4xx.h" #include "stm32g4xx_hal.h" #define SYS_MEM_BASE 0x1FFF0000 void JumpToBootloader(void) { __disable_irq(); SysTick->CTRL = 0; for (int i = 0; i < 8; i++) { NVIC->ICER[i] = 0xFFFFFFFF; NVIC->ICPR[i] = 0xFFFFFFFF; } __DSB(); __ISB(); HAL_DeInit(); HAL_RCC_DeInit(); __HAL_RCC_HSI_ENABLE(); while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET); __HAL_RCC_SYSCLK_CONFIG(RCC_SYSCLKSOURCE_HSI); __DSB(); __ISB(); uint32_t msp = *(__IO uint32_t *)(SYS_MEM_BASE + 0x0); uint32_t reset = *(__IO uint32_t *)(SYS_MEM_BASE + 0x4); SCB->VTOR = SYS_MEM_BASE; __DSB(); __ISB(); __

Hello, I am working with an STM32G431 MCU and referring to the STM32G4 Series Safety Manual (UM2454). In section 3.6.4 (Embedded Flash Memory) — Table 21: FLASH_SM_0, it describes a periodic software test for Flash memory using signature-based methods (e.g., CRC). According to the document, this diagnostic can be implemented via X-CUBE-STL, but I would like to implement it manually, without using the STL library. My goal is to verify Flash memory integrity periodically or at startup by computing a CRC over a defined Flash region and comparing it with a stored “golden” reference signature in Flash. I would like to understand the following: What is the correct approach to implement FLASH_SM_0 manually according to the safety manual’s requirements? How should I select the Flash regions for testing (code, data, unused memory)? What is the recommended way to store and update the reference (golden) CRC signature in Flash? Are there any STM32 hardware CRC peripheral examples or best p

Hello,I have modbus master and slave device, where I have design modbus master for testing in that way that it will continuously send modbus request  after each successfull response, and if any response fail then it stop.Now on  I'm getting continuous response from slave device and working fine. The issue is with slave device having undesired behavior if we restart the slave device.Slave device has custom bootloader and slave device. So once we start the device it will start bootloader and bootloader will take care to check integrity of slave application and if all well, then jump to slave application.So, if I dump the code in release mode (via bootloader) first time then slave device continuously give response on each request and it continue until I stop or reset and even after master reset and ON again, the slave device still continue to work well.Note: It works in all the way if we dump a debug code, only issue with release code. I have remove bootloader and allow to run s

Description:My RTOS application on NUCLEO-H563ZI board runs a thread CollectSamplesThread. I generate an interrupt every 8Khz using a timer and the ISR triggers a non blocking SPI transfer:The application code: void InitAdeSpi() { // SPI1 Initialisation if (hSPI.hdmarx != NULL) { HAL_DMA_RegisterCallback(hSPI.hdmarx, HAL_DMA_XFER_CPLT_CB_ID, AdcSpiRxCallback); } } void AdcSpiRxCallback() { BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Release the sempahore thats blocked to validate the frames in CollectSamplesThread xSemaphoreGiveFromISR(xSpiRxSemph, &xHigherPriorityTaskWoken); portYIELD_FROM_ISR(xHigherPriorityTaskWoken); }  void TIM3_IRQHandler(void) { EvbDataRdyTimerHandler(); } void EvbDataRdyTimerHandler(void) // Ensure this matches the existing declaration { __HAL_TIM_CLEAR_FLAG(&hTimDready, TIM_FLAG_UPDATE); // Release the sempahore that is blocked in the CollectSamplesThread for Dready callback xSemaphoreGiveFromISR(xSamplesAvailS

Hello, I have modbus master application (Free RTOS using CMSIS lib), in which modbus constructure init the timer_ with osTimer. osTimerId_t ModbusMaster::createTimer_(const char* name) { osTimerAttr_t attr{}; attr.name = name; auto t = osTimerNew(responseReady_, osTimerOnce, this, &attr); return t; } So Modbus master send request to slave and start timer to wait for response, at start stagingLength_ = 0 __HAL_UART_ENABLE_IT(uart_, UART_IT_RXNE); HAL_UART_Receive_IT(uart_, &mbMsg_.payload.rawResponse.rawData[stagingLength_], 1); osStatus_t stat = osTimerStart(timer_,1500); Now as soon as I got first character received, I will change the period of timer to 3.5 character silence time and once that silence time is expire, the time will invoke its callback as responseReady(). Here below the value 1000 is not match with silence time but keep as big as possible. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { if(huart->Instance == USART2) { BaseType_t xHighe