STM32 MCUs Embedded software

Hello,I'm doing Modbus communication using RS485. And using MAX485 IC to convert to RS485. and running on Free RTOS CMSIS.I have tried and the behavior is random for all below, not consistent. Here I have tried with RS232 and it works like charm. The only issue with RS485. Where Modbus slave we have testing separately and it works fine too. - Transmit and receive blocking call but seen packet drop during receive- Transmit and receive interrupt with each byte and complete block of bytes, and saw complete frame is missing in reception.- Transmit blocking and Receive using DMA, saw complete frame missing during reception.- Transmit DMA and Receive DMA, saw receive frame is missing. So lets continue discussion on DMA transmit and receive.Here is the configuration for DMA and the USART2 is running at 16mhz- Enable DMA for rx and tx and also enable rs485 hardware flow control, so that it can internally handle the DE pin.static void MX_USART2_UART_Init(void) { huart2.Instance = USA

Hello,It is the first time I am using STM32 and migrating my code from texas instruments controller using USART3. I want to receive data and then transmit data of different sizes. I get a problem that I see appears often but in my case I cannot see why it appears. I want to use USART on port C, PC4 = Tx and PC5 = Rx. I have a partner sending data via uart and I can see the data is on the Rx line but somehow it does not come to the buffer. I get to the interrupt handler and then Error callback. I am using the receive to Idle with interrupts when data is received. The first expected data is 10 bytes, my rx buffer is 1024 big and my rx buffer is defined , not NULL. I call the function for receive directly after my partner device is on and I have got the reply this device is on. The partner device is making 10 attempts to send the same data and without answer is shutting down. It starts sending shortly after it is on. My uart onfiguration is as follows:  handleUart3.Instance

  Hello everyone, I am working with an STM32H5 series board and have successfully initialized Ethernet using the lwIP stack.The DHCP process works correctly — I am able to obtain an IP address. However, I am facing a “Request Timeout” issue when I try to communicate with other devices or servers over the network. Below is my sys_check_timeouts() function (default lwIP implementation):     void sys_check_timeouts(void) { u32_t now; LWIP_ASSERT_CORE_LOCKED(); now = sys_now(); do { struct sys_timeo *tmptimeout; sys_timeout_handler handler; void *arg; PBUF_CHECK_FREE_OOSEQ(); tmptimeout = next_timeout; if (tmptimeout == NULL) { return; } if (TIME_LESS_THAN(now, tmptimeout->time)) { return; } next_timeout = tmptimeout->next; handler = tmptimeout->h; arg = tmptimeout->arg; current_timeout_due_time = tmptimeout->time; memp_free(MEMP_SYS_TIMEOUT, tmptimeout); if (handler != NULL) { handler(arg); } LWIP_TCPIP_THREAD_ALIVE(); } while (1); } My setup: Control

Hi everyone, I'm working on a STM32F429I-Discovery board and trying to output a 24 MHz PWM signal on PA8 (TIM1_CH1) to drive an MT9M001 camera module as the XCLK signal. In my own CubeMX-generated project, PA8 stays LOW — no waveform appears.However, if I take the official exampleProjects/STM324x9I_EVAL/Examples/DCMI/DCMI_CaptureMode,and add the same PWM settings, the signal comes out fine. Here’s what I confirmed: TIM1 initialized successfully with HAL_TIM_PWM_Init() and HAL_TIM_PWM_ConfigChannel(). GPIO A8 = AF1_TIM1, Push-Pull, No Pull, Very High Speed. HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1); is executed. PWM period = 7 (≈ 22.5 MHz), pulse = 4 (≈ 50 % duty). System clock = 180 MHz (PLL on HSE 8 MHz). No error occurs, but no output.   Thanks for any advice! Edited by ST moderator: removed system_stm32f4xx.c content not needed for the conversation.

We need to use quadrature phase counting with STM. can u please confirm if phase failure is supported in this mode or not .

I ran the example project and successfully displayed “Hello World” on Tera Term.Then I tried to port this project into my own one.However, the result was garbled characters in the terminal.The baud rate (115200) and PLL/clock configuration are the same as in the working example.Do you have any idea what might cause the characters to be corrupted? /** ****************************************************************************** * @file DCMI/DCMI_CaptureMode/Src/main.c * @author MCD Application Team * @brief This example describes how to configure the camera in continuous mode. ****************************************************************************** * @attention * * Copyright (c) 2017 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided

Hi everyone,I’m currently working with the VENC_RTSP_SERVER example. I was able to successfully run it and capture video using ffplay, but the stream is currently encoded at 960×720 @ 20fps.I’m trying to reduce the resolution to 480×480@20fps. To achieve this, I modified the MX_DCMIPP() function and changed the encoderI also tried adjusting related parameters such as ewl_pool, VENC_OUTPUT_BLOCK_SIZE, and VENC_OUTPUT_BLOCK_NBR.However, after these changes, the video feed is distorted and looks like this:Has anyone encountered this issue or know what additional configurations need to be updated to properly support a 480×480 resolution?Thanks in advance for any guidance!

Hi,Tried to convert STM32CubeN6\Projects\STM32N6570-DK\Applications\USBX\Ux_Device_Audio_2.0 example of the USB speaker to the USB microphone on STM32N6570-DK.The USB device is enumerated as an audio recording device, ux_device_class_audio_stream_frame_done() is called, and then I fill the buffer with the functionsux_device_class_audio_write_frame_get(audio_play_stream, &frame_buffer, &frame_length); ux_utility_memory_copy(frame_buffer, &stereo24[idx], 12 * 2); SCB_CleanDCache_by_Addr(frame_buffer, 12 * 2); ux_device_class_audio_write_frame_commit(audio_play_stream, 12 * 2);The buffer is filled with a tone of 32767 magnitude, but recorded data is 70dB lower, or just strange noise.I can share this small project via DM if it's convenient.Regards.

Hello,I am using the Nucleo U575ZI-Q board. I need to use GPDMA synchronized with a timer to set multiple GPIO pins synchronously, perform SPI transmission, and configure PWM periods.I have found a working combination: software request + trigger TRGO. However, TRGO is only available for TIM15 and TIM2, which limits its versatility. Ideally, I would like to use hardware requests (such as REQUEST_TIM15_UP).Set TIM15 to output TRGO. Configure GPDMA1_CHANNEL7 with LinkedList for DMA_REQUEST_SW and set the trigger to GPDMA1_TRIGGER_TIM15_TRGO. The direction should be set to Memory-to-Memory. Specify the source as memory and the destination as GPIOA->BSRR or SPI2->TXDR. This will allow you to generate the waveform shown in the attached oscilloscope.uint32_t gpio_node_data[4] = { 0x00000100U, // PA8 = High -> bit8 set (1 << 8) 0x01000000U, // PA8 = Low -> bit24 set (1 << (8 + 16)) 0xFFFFFFFF, 0xFFFFFFFF }; uint32_t spi2_node_data[4] = { 0xAAAAAAAA, 0x55555555, 0x11111

Hi,first foray into STM32 with a Nucleo-F7222ZE.Using CubeMX I have set up Timer1 to generate PWM. I can get outputs OC1, OC2, OC3 etc, but I cannot get the complementary outputs OC1N, OC2N, OC3N to operate. I feel like I'm missing something, like dead band between OC1 and OC1N for example..I've tried just about every combination I can think of in CubeMX, with no result so far. Craig

I am trying to configure a single microphone with a pulse-density modulation (PDM) output on my microcontroller (STM32U575ZIT). It's a CMM-4030DT-261280-TR MEMS microphone.But I can't seem to figure out the basics. The SAI settings mention "Frame Length", "Data Size" and "Slot Size". What even are slots and frames in this context? I think I understand PDM and it makes sense to define a data size: how many bits should be counted together to form a single data point. The other notions however confuse me.Attached is my SAI config from CubeMX. I logged the clock and data using a logic analyzer some testing code on the MCU hoping to figure this out. The code: HAL_SAI_Init(&hsai_BlockA1); std::array<uint8_t, 8> data; data.fill(0); auto ok = HAL_SAI_Receive(&hsai_BlockA1, data.data(), data.size(), 100); HAL_SAI_DeInit(&hsai_BlockA1);The analyzer output and the content of data after this block: For one I am surprised to see 37 rising edges, instead of 8

Hi All ,Am imported a example project in  stm32cube and i tried to build am getting error as Description Resource Path Location Typenon constant or forward reference address expression for section .ARM.extab LTDC_Paint line 90, external location: c:\st\stm32cubeide_1.6.0\stm32cubeide\plugins\com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924\tools\arm-none-eabi\bin\ld.exe:D:\stm32_projects\exp1\LTDC_Paint\STM32CubeIDE\STM32H750XBHX_FLASH.ld C/C++ Problem can u please provide the solution.thankyou,regards shiva chary 

Hello ST, I am having some trouble generating two PWM signals for a push pull converter.  Ideally I would like the PWM outputs to look like this, I would like the PWM frequency to be 100kHz and a duty cycle range of 0% to 50%. I have connected the push pull converter to PA0 and PA1. First I configure the GPIO Pins, void MX_PWM_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* Enable clocks */ __HAL_RCC_TIM2_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); /* Configure PA0 for TIM2_CH1 */ GPIO_InitStruct.Pin = GPIO_PIN_0; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; GPIO_InitStruct.Alternate = GPIO_AF2_TIM5; //CH1 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* Enable clocks */ __HAL_RCC_TIM5_CLK_ENABLE(); /* Configure PA1 for TIM5_CH2 * NOTE: Using CH2 on PA1 to avoid conflict with TIM2_CH1 on PA0 * You can use different pins if needed */ GPIO_InitStruct.Pin = GPIO_PIN_1; G

Hello,In the STM32CubeC0 v1.4.0, when I enable the BYPSHAD bit in the CR register and later try to deinit the device, I get an ERROR. It does not happen if I disable it before deinitialising. Should I disable it by hand, or is it a mistake and should be cleared as in other families? HAL version is clearing the whole register to the reset value when deinitialising.Best regards,Tomáš

Hopefully this is not a dumb question...I am referencing the example code here:https://github.com/STMicroelectronics/STM32CubeG4/tree/master/Projects/STM32G474E-EVAL/Applications/OpenBootloaderI see the entry point for the the open bootloader app (app_openbootloader.c), but I don't see where the actual core files for the the bootloader are ( ie openbl_core.c)Where would those files be in that project? Do I just download those files from here seperately? https://github.com/STMicroelectronics/stm32-mw-openbl/tree/main/Core  

Hi,We are building an IoT device, using STM32L476RET6 as main core. It communicates with an LPWAN modem with AT-commands via UART. We have redirected UART2 into external pins for "serial output" into Nucleo RX pins.During testing, we noticed initially that some devices where seemingly "stuck" in some state - no printing in Nucleo RX, not responding to external interrupts - while communicating with LPWAN modem ( it stayed in idle ON state). No hard fault or similar (we have put checks inside repsective callbacks). IWDG can reset the device, but it is a "last resort" method.After putting device in debug mode, catching the situation and pausing the code, it stopped here : void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { uint32_t isrflags = READ_REG(huart->Instance->ISR); uint32_t cr1its = READ_REG(huart->Instance->CR1); <<<-------Looking at USART1 ISR register, we found ORE error flag.Resuming the code in debug mode makes the MCU continue, but in run

Hello everyone, I am using an STM32 microcontroller and I am facing a problem when I try to mount an external flash memory. The problem is inside the function lfs_dir_fetch which is returning unexpected values in the test buffer here:  struct lfs_disk_dir test; int err = lfs_bd_read(lfs, tpair[i], 0, &test, sizeof(test)); lfs_dir_fromle32(&test); the returned values are:  Invalid size: test.size = 335610112, block_size = 40960 Invalid size: test.size = 335610112, block_size = 40960 lfs error:495: Corrupted dir pair at 0 1 lfs error:2214: Invalid superblock at 0 1 (*)Error in mounting external flash memory I have successfully communicate with the external flash, since I am able to read its manufacture ID. I have also configured properly the littlefs function and I test them by writing raw data to the external flash and I was able to receive them correctly. I cannot understand what is the test variable that is being declared and why

So I made a custom bootloader that I use to update the MCU firmware. So I have both the bootloader and the main app in the Flash. What I wanted to do, is to write on a specific address (out of bootloader and application, of course) a kind of a flag that notifies the app when it is necessary to go to the bootloader to update the firmware. Any clue on how to do it? I am using a STM32U585, using the B-U585I-IOT02A board. Thank you! 

Hi ST Community,once again I have found a USB PD Specification violation, that I can't find the reason for:Source operation: According to USB PD Spec the order of action is as follows:1. Detect Sink using CC lines and only if sink is detected continue with the next points2. Enable VBus to safe5V3. Once safe5V is applied send source capabilities message However current implementation of the ST Stack does not care about the state of VBus. It starts immediately sending out source capabilities messages.I guess the problem is that PE Task is started immediately on Attach event in USBPD_DPM_CADCallback. And it never checks for the bus voltage. I composed a crude minimal example that does not even do anything when it should enable VBus but still source capabilities message is blown out immediately. Please find the minimal example attached. Did I miss anything? Will I need to find a workaround or can we get a fixed version of the library?Best regards,Adrian

The serial port 1 code generated by the latest STM32CubeMX 6.13.0 will print garbled characters, and using the serial port routine UART_Printf in STM32Cube_FW_H7_V1.12.0 will also print garbled characters. It doesn't work when using the serial port routine UART_Printf in STM32Cube_FW_H7_V1.11.2. After comparison, there is a difference here. I can’t understand the function here. I will be careful whether changing it will affect other functions. *This post has been translated from Chinese to comply with the ST Community guidelines.

Post edited by ST moderator to be inline with the community rules for the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code. Hello! I connect one I2C target and one I3C target device both to PB6/PB7,  which is configured to be "mixed I3C and I2C bus" through STM32CubeIDE. I3C parameter configuration is as below: /* USER CODE END I3C1_Init 1 */ hi3c1.Instance = I3C1; hi3c1.Mode = HAL_I3C_MODE_CONTROLLER; hi3c1.Init.CtrlBusCharacteristic.SDAHoldTime = HAL_I3C_SDA_HOLD_TIME_1_5; hi3c1.Init.CtrlBusCharacteristic.WaitTime = HAL_I3C_OWN_ACTIVITY_STATE_0; hi3c1.Init.CtrlBusCharacteristic.SCLPPLowDuration = 0x18; // 5MHz hi3c1.Init.CtrlBusCharacteristic.SCLI3CHighDuration = 0x18; hi3c1.Init.CtrlBusCharacteristic.SCLODLowDuration = 0x7b; //1MHz hi3c1.Init.CtrlBusCharacteristic.SCLI2CHighDuration = 0x7b; hi3c1.Init.CtrlBusCharacteristic.BusFreeDuration = 0x69; hi3c1.Init.CtrlBusCharacteristic.BusIdleDuratio

Hi,Im new to STM and trying to use 1 adc with DMA with 2 input and reading value.Board :STM32H753XI  EVALADC 1 :INP0 rank 1INP1 rank 2Functions : void adc_dma_multi(void)void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) Results :I tried to swap rank between INP0 and INP1 to check if my second entry was read correctly and there were no hardware problems, and the result is the same: rank1 is read correctly but rank2 = 0. I have attached main.c and IOC. 

I am new to STM32 programming.I am doing an stm32 project with STM32F407VET6 MCU, I want to implement a music player that can read a list of wav files from sd card and stream the music data to a external DAC chip (PCM5012a) using double buffering apporach. I have configured SDIO and FATFS with DMA enabled for perfrming the sd card interfacing and read files, which should be working normally. But the main problem is comming from I2S3 with DMA, as it doesnt continue stream subsequent audio chunks after the 1st one. Here is my i2s3 ioc configurations:I tested the playback in my main.c file, this is an abridged version:/* Includes ------------------------------------------------------------------*/ #include "main.h" #include "fatfs.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ #include "lcd.h" #include "touch.h" #include <stdio.h> #include "sd_interface.h" /* USER CODE END Includes */ /* Private define -----------

Hello, I have a problem with a STM32L431CC generating a circular PWM burst with the DMA. I am using the Timer1 to generate 4 PWM signals on the Pins PA8, PA9, PA10, PA11. The systemclock of the Timer 1 is 80 MHz. The frequency of the PWM signal should be 20kHz. I have attached the code snipped were i configured the GPIO, Timer and DMA in the software. I get no PWM signal from the GPIO pins. When I manipulate the CCRx registers of the Timer1 with the ST Link debugger, I am able to generate PWM signals with the correct frequency and duty cycle. I suspect that the Timer1 do not make a DMA request and I am not able to find the failure. The DMA do not set any interrupt flags. Also when I manipulate the DMAR register of Timer1, I can see a valid PWM signal. Would be great when someone can support me Thanks Patrick     #define TIM1_PSC_INIT 0u #define TIM1_ARR_INIT 3999u /* ~20 kHz at 80MHz systemclock frequency */ #define TIM1_RCR_INIT 0u uint16_t volatile tim1_dma_buffer[] = {

rm0456 describes CKDIV belonging to the FDCAN register structure, However the actual header in the cmsis_device_u5 repo make it a member of the FDCAN_Config_TypeDef. This is missleading!   Probably FDCAN_Config_TypeDef. is some structure found in the MCAN IP. There is no description of FDCAN_Config in the reference manual. A description is welcome,