Order of disabling in `HAL_TIM_IC_Stop_DMA` function

Here is the function body of `HAL_TIM_IC_Stop_DMA`:

HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
 /* Check the parameters */
 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
 switch (Channel)
 {
 case TIM_CHANNEL_1:
 {
 /* Disable the TIM Capture/Compare 1 DMA request */
 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
 break;
 }
 
 case TIM_CHANNEL_2:
 {
 /* Disable the TIM Capture/Compare 2 DMA request */
 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
 break;
 }
 
 case TIM_CHANNEL_3:
 {
 /* Disable the TIM Capture/Compare 3 DMA request */
 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
 break;
 }
 
 case TIM_CHANNEL_4:
 {
 /* Disable the TIM Capture/Compare 4 DMA request */
 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]);
 break;
 }
 
 default:
 break;
 }
 
 /* Disable the Input Capture channel */
 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
 
 /* Disable the Peripheral */
 __HAL_TIM_DISABLE(htim);
 
 /* Change the htim state */
 htim->State = HAL_TIM_STATE_READY;
 
 /* Return function status */
 return HAL_OK;
}

My question is why at first it disables the DMA and then disables the input capture channel?

Is the order important?

I have a problem with this order. In my case the input capture triggers another timer every time it captures. so by doing this I have the number of captures. when I used `HAL_TIM_IC_Stop_DMA` function there was a difference between the number of captured data and the counter of the other timer. I found out the problem is because of the order I mentioned. so before calling this function I called `TIM_CCxChannelCmd` and the problem disappeared. But I wonder if it causes any problem.