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Roth.Ian
Roth.Ian
Associate III
April 30, 2026
Question

STM32U575VGT: Autonomous SPI reading

  • April 30, 2026
  • 6 replies
  • 168 views

I have a project where a STM32U575VGT must convert a SSI multiturn encoder value into a parallel single turn value for GPIO output. The SSI values are 3 bytes long, and it would be best if the CPU is only interrupted when the last 2 values differ. I have set up SPI2 to have GPDMA channels for TX and RX (although only RX is needed). DMA transfers work, but when I try to enable autonomous mode with LPTIM1 Channel 1 as a trigger, there are no interrupts for SPI2 or the DMA channels. How do I trigger the SPI read every ~1ms? Is this something only achievable with the LL libraries rather than HAL? Is it possible to interrupt the CPU only if the 3 bytes read from the SPI differ from the previous value?

6 replies

AScha.3
AScha.3
Super User
May 1, 2026

>How do I trigger the SPI read every ~1ms?

You could use a timer , but if just 1ms is ok: use the systick int , write there just the HAL command to start the gpdma transfer...thats it. 

 

> Is it possible to interrupt the CPU only if the 3 bytes read from the SPI differ from the previous value?

No, somebody has to compare the old--new values and decide then; this is a simple job for the cpu.

 

So just use the dma finished int , compare there the 3 bytes and decide "set new value "or not.

Maybe needs some 16 cpu clocks or so, thats so fast, you will not notice it ... 

and dont forget to set optimizer , -O2 (i use always), to get the best speed of an arm cpu.

 

And you can ask the sidekick Ai here, how to do in detail: klick on

AScha3_0-1777621809475.png

and ask:

how to start gpdma transfer in systick int ?
 
 
 
 

1. Starting GPDMA Transfer in SysTick Interrupt

To start a GPDMA transfer in a SysTick interrupt, you need to ensure the DMA channel is properly configured before enabling the transfer. The general approach is:

  • Program the DMA address in the relevant register before enabling the channel.
  • This setup allows the DMA controller to fetch or update data buffers for the transfer when triggered, such as from an interrupt handler like SysTick.

2. Triggering GPDMA Transfer from an Interrupt Handler

The procedure to trigger a DMA transfer from an interrupt handler (such as SysTick) involves:

  • Initializing and enabling the relevant DMA channel as per the initialization procedure.
  • When the interrupt occurs (e.g., SysTick_Handler), reinitialize or start the DMA channel for the next transfer.
  • For each transfer, ensure the DMA channel is correctly set up and enabled within the interrupt handler.
  • After the transfer completes, handle the completion interrupt and repeat the process for subsequent transfers if needed.

3. Configuring and Starting GPDMA Transfer

To configure and start a GPDMA transfer in STM32:

  • In STM32CubeMX, select GPDMA1 under System Core and set the mode (Standard Request or Linked-list).
  • Assign channels and configure the request (e.g., USART1_RX) in the DMA Settings tab.
  • In your code, include the necessary headers, declare buffers, and configure the DMA handle.
  • For linked-list mode, link the queue to the channel and register error callbacks.
  • Start the DMA transfer using HAL_DMAEx_List_Start_IT (linked-list) or HAL_DMA_Start_IT (standard).
  • Monitor transfer completion and handle errors as needed.
  • This process can be initiated from within the SysTick interrupt handler by calling the appropriate HAL function to start the transfer.

Summary

To start a GPDMA transfer in a SysTick interrupt:

  • Configure the GPDMA channel and request source in CubeMX or manually in code.
  • In the SysTick interrupt handler, call the appropriate HAL function to start the DMA transfer.
  • Ensure the DMA channel is properly initialized before enabling the transfer in the interrupt context.

For additional support or to discuss your specific application with ST experts, you’re welcome to join conversations in STM32 forums.

 

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Roth.Ian
Roth.IanAuthor
Associate III
May 1, 2026

Thank you for the reply. It doesn't seem like a big CPU load, but the comparison and restarting the SPI in interrupt mode or DMA mode is enough to cause problems with a motor control routine the microcontroller is also running. This is why I want to have this functionality operate as autonomously as possible.

MM..1
MM..1
Chief III
May 1, 2026

Primary add info, work your SPI data source as master or slave, or oposite work STM as master or slave?

Roth.Ian
Roth.IanAuthor
Associate III
May 5, 2026

The SPI is configured as a master in receive only mode. I have an unused TX DMA channel set up because it seems to be needed by the HAL driver.

MM..1
MM..1
Chief III
May 5, 2026

Ok then your MCU is master, but SPI cant receive as master without send. Then blk

TIM TRGO
 ↓
DMAMUX
 ↓
DMA TX (dummy byte)
 ↓
SPI -> clock out
 ↓
SPI RX
 ↓
DMA RX
Roth.Ian
Roth.IanAuthor
Associate III
May 6, 2026

Does the STM32U5 have DMAMUX? Does it matter for your flow chart?

Roth.Ian
Roth.IanAuthor
Associate III
May 8, 2026

I found a demo SPI_FullDuplex_ComDMA_Autonomous_Master in the STM32CubeU5 package. It targets a similar STM32U575 device on the NUCLEO-U575ZI-Q board. I don't see any output on the SPI SCK pin when I use STM32CubeMX to retarget the microcontroller to the STM32U575VGT I am using and change SPI1 to SPI2. Using SWD I don't see any interrupts in the interrupt log.

MM..1
MM..1
Chief III
May 9, 2026

Yes this example is good start, but isnt simple change SPI1 to SPI2 ... better is attach here ioc file as minimum.

Roth.Ian
Roth.IanAuthor
Associate III
May 13, 2026

Attached is the converted project to the microcontroller I am using.

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