Skip to main content
LSchj.1
Associate
September 28, 2021
Question

Is there a way to do dead time compenstaion using a STM32g4 running a PMSM motor? When changing the PWM period to compensate the period will phase shift. Is there a way to set the low side and high side for a capture compere register in center align

  • September 28, 2021
  • 3 replies
  • 2360 views

My compensation today:

if(I->a >= deadband_thresholde)

        {

          compare_u += dead_time_comp;

        }

        else if(I->a <= -deadband_thresholde)

        {

          compare_u -= dead_time_comp;

        }

        if(I->b >= deadband_thresholde)

        {

          compare_v += dead_time_comp;

        }

        else if(I->b <= -deadband_thresholde)

        {

          compare_v -= dead_time_comp;

        }

        if(I->c >= deadband_thresholde)

        {

          compare_w += dead_time_comp;

        }

        else if(I->c <= -deadband_thresholde)

        {

          compare_w -= dead_time_comp;

        }

__HAL_TIM_SET_COMPARE(htim, TIM_CHANNEL_U, compare_u);

    __HAL_TIM_SET_COMPARE(htim, TIM_CHANNEL_V, compare_v);

    __HAL_TIM_SET_COMPARE(htim, TIM_CHANNEL_W, compare_w);

This topic has been closed for replies.

3 replies

waclawek.jan
Super User
September 28, 2021

Try to draw a timing diagram to show us what is the problem and what do you want to achieve.

JW

LSchj.1
LSchj.1Author
Associate
September 28, 2021

I tried to do a drawing by hand :p

cedric H
Technical Moderator
September 28, 2021

Hello,

If your question is about hardware capabilities of the STM32G4 to support dead time compensation algorithm, the answer is yes, it can be done with STM32G4.

In our current MC-SDK, we did not implement it.

Now, your question seems to be more related to the Timer specification itself, and I am not sure it is the right forum to ask.

Regards

Cedric

LSchj.1
LSchj.1Author
Associate
September 28, 2021

The question is timer specific, but I also wonder how people do dead time compensation in their projects. I have setup the dead time in hardware and want the regulator to compensate for this deadtime.

-Lars

waclawek.jan
Super User
September 28, 2021

Lars,

What you've drawn appears to match the Asymmetric PWM mode, read TIM chapter's subchapter of this name in the RM. However, only 2 asymmetric outputs are available per timer, as this mode combines 2 channels into 1.

Note, that deadtime insertion as described in the Complementary outputs and dead-time insertion subchapter shifts only one edge of the signal appearing on the output pin.

JW

cedric H
Technical Moderator
September 28, 2021

Hello,

If three phases are needed with this asymmetric shape, it is possible to achieve that with the help of a DMA that will reconfigure the CCR[1-3] registers.

The idea is that when the timer reach the auto reload value, a DMA event is generated and will copy 3 news values to the CCR[1-3]. Same has to be done when the counter reach 0.

Cedric.

LSchj.1
LSchj.1Author
Associate
September 28, 2021

Thanks Cedrick,

That's a good idea. I will try to do that.

Lars