Associate III

Question

High frequency clock signal generation

Forum|Forum|8 years ago
April 16, 2018
6 replies
3955 views

Posted on April 16, 2018 at 23:34

Hi,

I'm facing a problem i can't solve. It seem so simple but i think i need an other point of view.

For a project using a led driver (LED1642GW) i need a clock in 20MHz~30MHz.

I forgot this oscillator in my hardware so i want to generate it with my MCU (and it will be cheaper).

I made the most simple project for my stm32L476VGT:

- HSI (or MSI) speeded up to 80MHz through PLLCLK.

- TIM5 with PWM or CC on Channel 1

- PA0 on Alternate function (TIM5 ch5) with very high speed

Reference manual is saying that internal clock of the timer is APB (so 80MHz).

Despite of my differents trys, i don't managed to get an output signal at 20MHz.

With the example bellow i expected a signal at 80/80 = 1MHz but i only get 400kHz...

Here is some screens:

Did i miss something? Or does the GPIO not made for this purpose?

Thanks!

#cubemx #pwm #clock #signal-generation

This topic has been closed for replies.

waclawek.jan

Super User

Posted on April 17, 2018 at 10:13

Read out and check/post the content of RCC and TIM5 registers.

JW

Félix TREFOUAuthor

Associate III

Posted on April 17, 2018 at 22:35

Here are the registers:

While trying to debug these register, i found the MCO capability, and i investigated:

So taking my SYSCLK at 80MHz and divide it by 4 will output my 20MHz frequency!?

But, even if this solution work, i want to find where i am wrong with this timer TIM2! :o

waclawek.jan

Super User

Posted on April 17, 2018 at 23:42

Yes, MCO would help you. And that would also reveal that your RCC settings are different from what you've shown as CubeMX screenshot in the first post. And also in the first post you are talking about TIM5, whereas you've given registers for TIM2.

It's impossible to help based on inconsistent information.

JW

Félix TREFOUAuthor

Associate III

Posted on April 18, 2018 at 10:26

Oups i changed from timer5 to timer2 between screens! But problem seem to be at System PLL, look at my next post!

Félix TREFOUAuthor

Associate III

Posted on April 18, 2018 at 10:47

Ok, the problem seems comming from the PLL ( perhaps CubeMX has error?)

So, for the tests, i've put my MSI at 16MHz set it to my SYSCLK. I configured MCO on PA8 with prescaler /8 and measured output on oscilloscope, for each test, i changed MCO source to measure clocks:

- MCO on MSI:

No problem here, MCO output was at 16/8 = 2MHz

-MCO on SYSCLK

Problem, MCO output was at 4MHz instead of 80/8 = 10MHz

-MCO on PLLCLK (to target the problem)

Problem, MCO output was at 4MHz too.

So i think my first problem was not an error on my timer but directly an error on PLLCLK.

Here is the PLLCFGR register:

PLLN has a wrong configuration...

It's comming from this MACRO in stm32l4xx_hal_rcc.c, all values of RCC_OscInitStruct are correct:

When i manually modify register values, MCO output is correct!

Here is the macro defined:

#define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \

(RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \

(uint32_t)(((__PLLP__) >> 4U ) << 17U) | \

(__PLLSOURCE__) | (uint32_t)((((__PLLQ__) >> 1U) - 1U) << 21U) | (uint32_t)((((__PLLR__) >> 1U) - 1U) << 25U))

Félix TREFOUAuthor

Associate III

Posted on April 18, 2018 at 13:01

Ok problem solved!

When PLLM is set to /1, CubeMX don't initialize RCC_OscInitStruct.PLL.PLLM, and when the macro substract 1, it overflow. So the value set on PLLCFGR is 0xfffffff1