[STM32Cube/MX] PLLI2S is not enabled when MCO2 is configured from it

Question

Hi!I use an STM32F746 and I configured STM32CubeMX clock tree as is :I just use PLLI2S for the MCO2 output (for Ethernet purposes). I don't use SAI1, SAI2, I2S or SPDIF-RX, so the HAL_RCCEx_PeriphCLKConfig function does not initialize PLLI2S:HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
...
 /*-------------------------------------- PLLI2S Configuration ---------------------------------*/
 /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */
 if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
 {
 ... // THIS SECTION IS NOT CALLED: plli2sused == 0 and PeriphClkInit->PeriphClockSelection is not strictly equal to RCC_PERIPHCLK_PLLI2S, although it contains it as a binary mask
 }
...
}The workaround is to initialize it manually after the SystemClock_Config() call : PLLI2SInit.PLLI2SN = 100;
 PLLI2SInit.PLLI2SP = RCC_PLLP_DIV2;
 PLLI2SInit.PLLI2SR = 2;
 PLLI2SInit.PLLI2SQ = 2;
 HAL_RCCEx_EnablePLLI2S(&PLLI2SInit);EDIT: actually it's a bug inside the HAL_RCCEx_PeriphCLKConfig function of STM32Cube HAL library, it should be:if((plli2sused == 1) || (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S))(By the way, MCO2 GPIO speed must be set manually to "Very high" inside STM32CubeMX settings)Thanks

Khouloud GARSI · Accepted Answer

Hi Romain,1- You're right! I'm able to reproduce your issue now. At first, based on your description, I was on "case 1" -> Signal was correctly gotten on MCO2. This is now internally highlighted and I will keep you posted about any further update. Thanks for bringing this point to our attention.2- However, I don't recommend to use the clock source output issued from the PLL on MCO2 pin for Ethernet.    When the clock source output by the MCU on the MCO pin is issued from the PLL,  the MCO pin cannot be used to deliver a 50 MHz RMII clock input or a 25 MHz MII clock input to the Ethernet PHY compliant with the long term jitter maximum value for 1.4 ns specified in the IEEE802.3 standard.As a workaround, you may : * In MII mode: Use a 25 MHz external crystal to generate the HSE clock and output the clock signal on the MCO pin to clock the PHY * In RMII mode: Either use an external 50 MHz oscillator to clock the PHY or select a PHY with an internal PLL that is able to generate the 50 MHz RMII clock. Khouloud.

Khouloud GARSI · Answer

Hi @motla​ ,Just by setting the PC9's maximum output speed to "Very High" using STM32CubeMX, you should be able to have a correct PLLIS2R signal on MCO2.The proposed update in "HAL_RCCEx_PeriphCLKConfig " function is not needed. If you're not able to see the correct signal on MCO2 using the "HAL_RCCEx_PeriphCLKConfig" function as it is, please further describe the seen behavior.Khouloud.

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