STM32 MPUs

I am using 2 passive tamper detection in my board that is routed to PC1 (TAMP_IN3) and PC13 (TAMP_IN1) and I want to handle both tamper pins events in linux userspace. I have achieved my goal by adding small code at plat_setup and disabling tamper in device tree. I also modified the init function in stm32_tamp so it won't reset my configuration. In addition, I also disable secure tamp to make sure that I can modify the register in linux userspace. Inside my small code, I reset the tamp configuration first (copy from stm32_tamp_reset_register) and enable TAMP_IN1 and TAMP_IN3 by setting bit 0 and bit 2 in TAMP_CR1 register. I also set bit 0 and bit 2 in TAMP_CR2 register as I don't want to erase backup memory after tamper event. This my code snippet/* Enable clock */ mmio_write_32(RCC_BASE | RCC_MP_APB5ENSETR, mmio_read_32(RCC_BASE | RCC_MP_APB5ENSETR) | RCC_MP_APB5ENSETR_RTCAPBEN);   /* unlock rtc protection */ mmio_write_32(PWR_BASE + 0x00, mmio_read_32(PWR_BASE + 0x00) | (1 <

Hello,I'm trying to connect some sensors to the I2C1 connectors of the STM32MP157A-DK1 and read datas from a linux application (Cortex A7). It doesn't works...But I successfully read data from the I2C5 connectors from the Cortex M4 processor.I used the following configuration from STM32CubeMX for I2C1: But when i run #i2cdetect -y 0 #i2cdetect -y 1 #i2cdetect -y 2I don't see any of my devices: Here is the DeviceTree file (located in "\CA7\DeviceTree\Monitoring\kernel\stm32mp157a-monitoring-mx.dts")&i2c1{ pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c1_pins_mx>; pinctrl-1 = <&i2c1_sleep_pins_mx>; status = "okay";   /* USER CODE BEGIN i2c1 */ i2c-scl-rising-time-ns = <100>; i2c-scl-falling-time-ns = <7>; /delete-property/ dmas; /delete-property/ dma-names;   hdmi-transmitter@39{ compatible = "sil,sii9022"; reg = <0x39>; iovcc-supply = <&v3v3_hdmi>; cvcc12-supply = <&v1v2_hdmi>; re

Hi,I am trying to use a STM32MP157C in combination with a lan9303 chip in mdio mode.when booting I get an error that says:LAN9303_MDIO: probe of stmmac-0:01 failed with error -22This prevents the driver from being loaded succesfully.I added the lan9303 according to the device tree bindings:&ethernet0 { status = "okay"; pinctrl-0 = <&ethernet0_rmii_pins_a>; pinctrl-1 = <&ethernet0_rmii_pins_sleep_a>; pinctrl-names = "default", "sleep"; phy-handle = <&switch>; phy-mode = "rmii"; max-speed = <1000>;   mdio0 { #address-cells = <1>; #size-cells = <0>;       switch: switch-phy@1 { compatible = "smsc,lan9303-mdio"; reg = <0>;     ports { #address-cells = <1>; #size-cells = <0>;   port@1 { reg = <0>; label = "cpu"; ethernet = <&ethernet0>; phy-mode = "rmii"; fixed-link { full-duplex

Hi：​I encountered a strange problem when I compiled TF source code separately to generate xxserialboot.stm32 File, but found that there are always errors? ​eg:make -f $PWD/../Makefile.sdk TFA_DEVICETREE=stm32mp157c-dk2 TF_A_CONFIG=serialboot ELF_DEBUG_ENABLE='1' all​But complain about the compiler：arm-ostl-linux-gnueabi-gcc: error: unrecognized command line option '-mstrict-align'; did you mean '-Wstrict-aliasing'?But it's normal when I compile the trust file alone：​make -f $PWD/../Makefile.sdk TFA_DEVICETREE=stm32mp157c-dk2 TF_A_CONFIG=trusted ELF_DEBUG_ENABLE='1' all​How can I fix this problem?Could you give me some advice？Best regards!​​​​​

Hi,i have a question regarding to the IPCC Communication and the OPENAMP_check_for_message(); function. For example iam sending data from A7 to the M4. So the A7 will cause an RXO Interrupt at the M4. Now my Question ist when this Interrupts is cleared with the TXF Interrupt. Is it straight cleared when the RXO Interrupt occured and the data will only put to a Queue and the Queue of Data is read out via the OPENAMP_check_for_message() Function. Or is it like this that the A7 cant Send Data anymore as long the OPENAMP_check_for_message() didnt get a call, because this Function will trigger the TXF Interrupt. From my understanding it would be more efficient when the Interrupt is cleared straight and the data is enqueued in a Queue.

Hi there,After following this tutorial (and updating the compatible string): https://wiki.st.com/stm32mpu/wiki/OTG_device_tree_configurationI've managed to create a patch that adds these nodes to my device tree:... +&usbphyc { + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>, <&usbphyc_port1 1>; + phy-names = "usb1-phy", "usb2-phy"; + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; + vbus-supply = <&usb1vbus>; + vdda1v1-supply = <&reg11>; + vdda1v8-supply = <&reg18>; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; + vbus-supply = <&usb2vbus>; + vdda1v1-supply = <&reg11>; + vdda1v8-supply = <&reg18>; +}; + +&usbotg_hs { + compatible = "st,stm32mp15-fsotg", "snps,dwc2"; + pinctrl-names = "default"; + pinctrl-0 = <&usbotg_hs_pins_a &usbotg_fs_dp_dm_pins_a>; /* configure OTG ID and full-speed data pins */ + vbus-supply

Good morning,I'm working on a C++ project to collect data from a peripheral sensor using the STM32MP157C-DK2.The estimated amount of data is at least 100 MB, so I have to use the DDR3 to store these data and then trasmit them over Ethernet using at the moment ONLY Cortex-A7 (no M4).The project is write in C++ language and NOT using CubeMX, so I'm asking how can I activate and use the DDR3.I've read some tutorials/documents from various sources:# https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html#documentation# https://wiki.st.com/stm32mpu/wiki/How_to_exchange_large_data_buffers_with_the_coprocessor_-_principle#rpmsg_sdb_driver# https://wiki.st.com/stm32mpu/wiki/How_to_exchange_large_data_buffers_with_the_coprocessor_-_exampleand consequently I wrote the code (you will find it here attached with the dts in the card partition called "bootfs"), but I always receive the cout message "Mapping param failed.".What I've to modify in the main code and, eventually, how/where

In our early evaluation phase, the stm32mp157 chip is ideal for our requirements - with the ability to do hard real-time processing with the M4 core but still have a Linux framework to develop interfaces to upstream processing applications. We feel that the DK2 Discovery board can be deployed in developed systems AS-IS until 'hardened' systems are needed for future military, space, and biomedical customers. The instrument technology we are developing is now being considered for phase-2 evaluation and studies with several interested clients but we need to know if the board will be available for a few years. In future 'hardened' systems, we and others will make our own boards using the stm32mp157 chip and request guidance regarding the long-term support commitment for the chip.Scott Tilden, PhDU of Arizona

I'm trying to get TIM7 interrupts working with the STM32MP157C-DK2 kit. I've added the necessary configuration to the DTS file:&m4_timers7 { pinctrl-names = "rproc_default"; pinctrl-0 = <&timer7_pins>; status = "okay"; };Do I need to enable the interrupt in the DTS file as well? I see in the M4 example DTS there is some configuration for a GPIO interrupt:&m4_rproc { m4_system_resources { status = "okay";   button { compatible = "rproc-srm-dev"; interrupt-parent = <&gpioa>; interrupts = <14 2>; interrupt-names = "irq"; status = "okay"; };   m4_led: m4_led { compatible = "rproc-srm-dev"; pinctrl-names = "rproc_default", "rproc_sleep"; pinctrl-0 = <&leds_orange_pins>; pinctrl-1 = <&leds_orange_sleep_pins>; status = "okay"; }; }; };On the M4 side: I've configured TIM7 in CubeMX (prescalar: 10000, period: 100, interrupt enabled). The only configuration I see for TIM7 comes from MX_TI

..

Hi,I flashed OS "en.FLASH-stm32mp1-openstlinux-5-4-dunfell-mp1-20-11-12.tar.xz" to board STM32MP157C-DK2. Then remove all the cable,and only remain a type C cable connected with my laptop Type C port.But the kit can't power on.Could you tell me how to let it to sink power as USB device,and source power as USB host?Thanks,QiZhang

Hello I have a question concerning how to build a customized image.I followed this link first to get a general IdeaAfter that, I found that if I need to customize my Kernel and choose my packages (Customer apps) I can follow these links: Customer App and Kernel config1- Should I customize before building my image using "bitbake <image>" or after (I suppose before but just asking) Just to be clear I will give some examples:Customer app will be used to add packages that may not be present Kernel configurations: To activate modules and features for example security, Bluetooth and Wi-Fi features.2- In which file do I need to be in order to apply the modifications that I want in my final image that I will flash.Best regards

My goal is to add i2c5 in the dts for userspace access however it is not visible at /sys/bus/i2c/devices. My steps are as follows:1) bitbake virtual/kernel -c devshell2) in new shell, modify the arch/arm/boot/dts/stm32mp157a-dk1.dts3) in new shell, make dtbs or make stm32mp157a-dk1.dtb, and close the new shell4) in original shell, bitbake virtual/kernel -f -c compile and bitbake virtual/kernel -f -c compile5) build-openstlinuxweston-stm32mp1/tmp-glibc/deploy/images/stm32mp1/scripts/create_sdcard_from_flashlayout.sh ../flashlayout_st-image-weston/trusted/FlashLayout_sdcard_stm32mp157a-dk1-trusted.tsv and create the .raw for dd to the sdcardHowever, with above steps seems the updated dtb file is not populated to the sdcard image. Am I missing some steps?

Hello,I create a custum linux distributuion for specific application. My goal is to use QT framework with OpenGl library trough GPU. To do that I used Buildroot 2019.023.1 and custum linux (V4.19) provided by your github. What parameters should I activeted to run my QT application with the -plateform elgfs argument ?I mean what library should I need (mesa or an other one) to run properly my application ?

I created an eglfs Yocto build that can run the simple Qt5 demos, but I'm seeing fairly high CPU usage and I'm trying to figure out if the GPU is being used. I pondered that the GPU may not accelerate 2D graphics very well and does better with actual 3D. So, I thought I'd add support for more Qt5 packages and see if the 3d demos ran any better, but I can't get it to build.I'm getting a compiler error while building QT5's ogl-runtime complaining that <GLES2.gl3.h> cannot be found. I'm new to this, but from what I can tell this header should be supplied with the opengl libraries and presumably ST should be supplying that library with GPU acceleration. Or perhaps something else is going wrong/missing?Is it possible to get the Qt5 3D demos to run under an eglfs build? Is there some way to verify if the GPU is being used?Thanks,Jon======In file included from /home/jon/STM32MP15/Distribution-Package/openstlinux-5.4-dunfell-mp1-20-06-24/build-openstlinuxeglfs-stm32mp1/tmp-glibc/work/cor

Hello,will there be updates to the gcnano-binaries?The latest version (6.4.3) seems to be broken.When trying to start the cog browser (wpewebkit based) it crashes on eglCreateWaylandBufferFromImageWL.After reverting to gcnano 6.4.1 it is working again. Also RDP screen-share is broken in weston with gcnano version 6.4.3 but working with 6.4.1.

Hi, i have a question regarding to exit the Low Power Mode on CM4. Is it possible that i can exit the CStop or CStandby Mode via an Rx Messages of the CAN Bus, when the CAN Bus is assigned to the M4. Iam confused because almost every Bus is listed in https://wiki.st.com/stm32mpu/wiki/Coprocessor_power_management as Wake Up Source except the CAN Bus.

Hello! I am trying to get CubeProgrammer to flash a NAND on a custom board.UBOOT detects the NAND chip and mtdparts lists the following:STM32MP> sf probe STM32MP> mtdparts   device spi-nand0 <spi-nand0>, # parts = 4 #: name size offset mask_flags 0: fsbl 0x00200000 0x00000000 0 1: ssbl1 0x00200000 0x00200000 0 2: ssbl2 0x00200000 0x00400000 0 3: UBI 0x1fa00000 0x00600000 0   active partition: spi-nand0,0 - (fsbl) 0x00200000 @ 0x00000000   defaults: mtdids : spi-nand0=spi-nand0 mtdparts: mtdparts=spi-nand0:2m(fsbl),2m(ssbl1),2m(ssbl2),-(UBI)It looks as though the FSBL partition size is 0x00200000 and it located at 0x0; however, when I attempt to use cube programmer with this TSV:#Opt Id Name Type IP Offset Binary - 0x01 fsbl1-boot Binary none 0x0 arm-trusted-firmware/tf-a-stm32mp157c-viper-serialboot.stm32 - 0x03 ssbl-boot Binary none 0x0 bootloader/u-boot-stm32mp157c-viper-trusted.stm32 P 0x04 fsbl1 Binary spi-nand0 0x00000000 arm-trusted-firmware/tf-a-s

Hello,I am using stm32mp157c-dk2 board and working on "How to exchange large data buffers with the coprocessor - example" from the wiki:https://wiki.st.com/stm32mpu/wiki/How_to_exchange_large_data_buffers_with_the_coprocessor_-_exampleI need to do some modifications on the example to be able to use a UART interface in the user application, usually I modify the device tree to enable the UART by adding the following lines to the .dts file (USART3 as an example):&pinctrl {... usart3_pins_mx: usart3_mx-0 { pins1 { pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ bias-disable; }; }; usart3_sleep_pins_mx: usart3_sleep_mx-0 { pins { pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */ }; };};&usart3 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&us

Hi,i just implemented the OpenAMP_tty_echo example for my device. And i just wanna know if i have the right understanding for it. Iam using two virtualUARTS, does this mean that i have two Endpoints over one RPMSG Channel. Or do i have two RPMSG Channel with one endpoint at one Channel? In my Undertsanding i have one RPMSG Channel with two Endpoints VirtUART0 and VirtUART1. Is there any use case to have multiple RPMSG Channels for communicating between the A7 and M4 (like shown in the picture)? And how i could integrate it? I should have another vdev device with again seperated Memory in the Shared Memory. Is my understanding correct in this cases?Thanks so far

I think I have encountered some difficult problems. I hope the engineer of ST can help me.I configured SPI+DMA to CM4 and then created two rPMSGs. RPMSg0 transmitted the data to CA7 in real time and RPMSg1 transmitted the heartbeat signal.When CA7 returns the heartbeat, the unscheduled CM4 will stop all transmissions.

How to mark a qustion as answered?

Hello ST Community,I had successfully run the "Hello World" code on my STM32MP1 which is based on python by the following link,https://docs.amazonaws.cn/en_us/greengrass/latest/developerguide/module2.htmlI have one sensor connected with STM32MP1. I had used /dev/i2c* and wrote a driver for the sensor in c language.I want to send sensor data to was greengrass, but greengrass only supports python language on lambda.How can I send sensor data written in c to aws green grass?Thanks and Regards,Nikunj Panchani

I've attempted to build my own u-boot image based on the trusted defconfig and a dk1 device tree, i.e.$ make stm32mp15_basic_defconfig $ make DEVICE_TREE=stm32mp157a-dk1 allThe build worked successfully, however when I attempted to use the `u-boot.stm32` image it failed to flash/boot. Getting the older fsbl working to flash my image into the ssbl ended up with failing messages:stm32_smc: Failed to exec in secure mode (err = -3) stm32_smc: Failed to exec in secure mode (err = -3) stm32_smc: Failed to exec in secure mode (err = -3) stm32_smc: Failed to exec in secure mode (err = -3) stpmic1_read: failed to read register 0x22 : -110stpmic1_read: failed to read register 0x22 : -110stpmic1_read: failed to read register 0x22 : -110stpmic1_read: failed to read register 0x22 : -110Can't enable vdda-supply: -110 stpmic1_read: failed to read register 0x22 : -110stpmic1_read: failed to read register 0x22 : -110stpmic1_read: failed to read register 0x22 : -110stpmic1_read: failed to read register

Hello,I'd like to drive a DSI panel using STM32MP157AAC Rev.Z.I have no problem with the panel in the u-boot and everything is ok [i can see the u-boot splash screen].So the hardware on both sides [board and panel] is ok, the panel init sequence, dts config, dsi, ltdc, bridge config and drivers are ok,....but after kernel start, the panel is not working any more:1- I can confirm the initial sequence works fine,2- Even, i can read the internal register of panel in LP mode in kernel boot time.3- drm, bridge, panel connection to ltdc, cma memory allocation are ok, [i add a lot of debuging print], there is no error from any modules and everything seems ok.4- I can confirm pll is ok, The pll and clock config is fully similar to u-boot configs.***But in the DSI video mode, the panel is not showing anything.[Using oscilloscope]: I can see the lanes signal in DSI video mode of u-boot but after entering DSI videos mode in kernel there is no activity in lanes,At this point I am confused, Re