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Question

Bug: LSE is mandatory and not optimal

Forum|Forum|1 month ago
May 1, 2026
3 replies
195 views

Hi ST Dev team!

I have found that LSE is mandatory when building a new custom board. If not LSE is mounted and configured, then both TF-A and Op-tee will complaining about clock ID 5, which is LSE.

Here is a walk around for Op-tee by removing the &clk-lse.

https://github.com/DanielMartensson/Watermelon-Wine-1A/blob/linux-testing/watermelon-wine-os%2Fcubemx%2FCA35%2FDeviceTree%2Ffirmware%2Foptee-os%2Fstm32mp257f-firmware-mx.dts#L497-L498

And for TF-A, ut must need some modification inside the code:

https://github.com/evildeeds/meta-watermelon-wine-stm32mp/blob/656727dfcfb62cffbcd6aaec07fc4dfc55024a75/recipes-bsp/trusted-firmware-a/tf-a-stm32mp/clk-stm32-core.c#L462-L465

Processor: STM32MP257F

OlivierK

Technical Moderator

Hello @DMårt

Thank you for pointing that out. It should also be fixed in OpenSTLinux DV6.2.

https://wiki.st.com/stm32mpu/wiki/STM32_MPU_OpenSTLinux_release_note_-_v6.2.0

Best Regards,

Olivier

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

DMårtAuthor

Lead

@OlivierK

No, it has not!

I build the official manifest from ST

repo init -u https://github.com/STMicroelectronics/oe-manifest.git -b refs/tags/openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18

And it gave me this:

This time, the output says clk-lse, instead of CLK ID = 5.

NOTICE: Early console setup
NOTICE: CPU: STM32MP257FAK Rev.Y
NOTICE: Model: STMicroelectronics STM32MP257F-DK STM32CubeMX board - openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18
NOTICE: Reset reason: Power-on reset (por_rstn) (0x2035)
INFO: PMIC2 version = 0x11
INFO: PMIC2 product ID = 0x21
INFO: FCONF: Reading TB_FW firmware configuration file from: 0xe011000
INFO: FCONF: Reading firmware configuration information for: stm32mp_io
INFO: FCONF: Reading firmware configuration information for: stm32mp_fuse
INFO: Using SDMMC
INFO: Instance 1
INFO: Boot used partition fsbl1
NOTICE: BL2: v2.10-stm32mp2-r2.0(debug):lts-v2.10.24-dirty(a07367a1)
NOTICE: BL2: Built : 16:16:36, Oct 3 2025
INFO: BL2: Loading image id 26
INFO: Loading image id=26 at address 0xe041000
INFO: Image id=26 loaded: 0xe041000 - 0xe049650
INFO: BL2: Doing platform setup
INFO: RAM: LPDDR4 32bits 1200000kHz
INFO: Memory size = 0x80000000 (2048 MB)
INFO: BL2: Loading image id 1
INFO: Loading image id=1 at address 0xe000000
INFO: Image id=1 loaded: 0xe000000 - 0xe000326
INFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0xe000000
INFO: FCONF: Reading firmware configuration information for: dyn_cfg
INFO: FCONF: Reading firmware configuration information for: risaf_config
INFO: RISAF2: No configuration in DT, use default
INFO: BL31 max size = 0x17000 (94208B)
INFO: BL2: Loading image id 3
INFO: Loading image id=3 at address 0xe000000
INFO: Image id=3 loaded: 0xe000000 - 0xe0169f0
INFO: BL2: Loading image id 19
INFO: Loading image id=19 at address 0x81fc0000
INFO: Image id=19 loaded: 0x81fc0000 - 0x81fc3b2c
INFO: BL2: Loading image id 4
INFO: Loading image id=4 at address 0x82000000
INFO: Image id=4 loaded: 0x82000000 - 0x8200001c
INFO: OPTEE ep=0x82000000
INFO: OPTEE header info:
INFO: magic=0x4554504f
INFO: version=0x2
INFO: arch=0x1
INFO: flags=0x0
INFO: nb_images=0x1
INFO: BL2: Loading image id 8
INFO: Loading image id=8 at address 0x82000000
INFO: Image id=8 loaded: 0x82000000 - 0x821087b8
INFO: BL2: Loading image id 2
INFO: Loading image id=2 at address 0x84400000
INFO: Image id=2 loaded: 0x84400000 - 0x8441c768
INFO: BL2: Loading image id 5
INFO: Loading image id=5 at address 0x84000000
INFO: Image id=5 loaded: 0x84000000 - 0x841d54b8
NOTICE: BL2: Booting BL31
INFO: Entry point address = 0xe000000
INFO: SPSR = 0x3cd
NOTICE: Early console setup
INFO: ARM GICv2 driver initialized
NOTICE: BL31: v2.10-stm32mp2-r2.0(debug):lts-v2.10.24-dirty(a07367a1)
NOTICE: BL31: Built : 16:16:36, Oct 3 2025
INFO: BL31: Initializing runtime services
INFO: BL31: Initializing BL32
I/TC: Early console on UART#6
D/TC:0 add_phys_mem:674 VCORE_UNPG_RX_PA type TEE_RAM_RX 0x82000000 size 0x000fd000
D/TC:0 add_phys_mem:674 VCORE_UNPG_RW_PA type TEE_RAM_RW 0x820fd000 size 0x00303000
D/TC:0 add_phys_mem:674 ta_base type TA_RAM 0x82400000 size 0x01c00000
D/TC:0 add_phys_mem:674 SRAM1_BASE type RAM_SEC 0x0e040000 size 0x00001000
D/TC:0 add_phys_mem:674 DBGMCU_BASE type IO_NSEC 0x4a000000 size 0x00200000
D/TC:0 add_phys_mem:674 GIC_BASE type IO_SEC 0x4ac00000 size 0x00200000
D/TC:0 add_phys_mem:674 SAHB_BASE type IO_SEC 0x46200000 size 0x01e00000
D/TC:0 add_phys_mem:674 SAPB_BASE type IO_SEC 0x46000000 size 0x00200000
D/TC:0 add_phys_mem:674 AHB5_BASE type IO_SEC 0x48200000 size 0x01e00000
D/TC:0 add_phys_mem:674 AHB4_BASE type IO_SEC 0x44200000 size 0x01e00000
D/TC:0 add_phys_mem:674 AHB3_BASE type IO_SEC 0x42000000 size 0x02000000
D/TC:0 add_phys_mem:674 AHB2_BASE type IO_SEC 0x40400000 size 0x01c00000
D/TC:0 add_phys_mem:674 APB4_BASE type IO_SEC 0x48000000 size 0x00200000
D/TC:0 add_phys_mem:674 APB3_BASE type IO_SEC 0x44000000 size 0x00200000
D/TC:0 add_phys_mem:674 APB2_BASE type IO_SEC 0x40200000 size 0x00200000
D/TC:0 add_phys_mem:674 APB1_BASE type IO_SEC 0x40000000 size 0x00200000
D/TC:0 add_phys_mem:674 APB1_BASE type IO_NSEC 0x40000000 size 0x00200000
D/TC:0 add_va_space:714 type RES_VASPACE size 0x02000000
D/TC:0 add_va_space:714 type SHM_VASPACE size 0x02000000
D/TC:0 dump_mmap_table:844 type TA_RAM va 0x70c00000..0x727fffff pa 0x82400000..0x83ffffff size 0x01c00000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x72a00000..0x72bfffff pa 0x4ac00000..0x4adfffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_NSEC va 0x72c00000..0x72dfffff pa 0x4a000000..0x4a1fffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x72e00000..0x74bfffff pa 0x48200000..0x49ffffff size 0x01e00000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x74e00000..0x74ffffff pa 0x48000000..0x481fffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x75000000..0x76dfffff pa 0x46200000..0x47ffffff size 0x01e00000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x77000000..0x771fffff pa 0x46000000..0x461fffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x77200000..0x78ffffff pa 0x44200000..0x45ffffff size 0x01e00000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x79200000..0x793fffff pa 0x44000000..0x441fffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x79400000..0x7b3fffff pa 0x42000000..0x43ffffff size 0x02000000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x7b600000..0x7d1fffff pa 0x40400000..0x41ffffff size 0x01c00000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x7d400000..0x7d5fffff pa 0x40200000..0x403fffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_NSEC va 0x7d600000..0x7d7fffff pa 0x40000000..0x401fffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:844 type IO_SEC va 0x7d800000..0x7d9fffff pa 0x40000000..0x401fffff size 0x00200000 (pgdir)
D/TC:0 dump_mmap_table:844 type RES_VASPACE va 0x7da00000..0x7f9fffff pa 0x00000000..0x01ffffff size 0x02000000 (pgdir)
D/TC:0 dump_mmap_table:844 type SHM_VASPACE va 0x7fc00000..0x81bfffff pa 0x00000000..0x01ffffff size 0x02000000 (pgdir)
D/TC:0 dump_mmap_table:844 type RAM_SEC va 0x81fff000..0x81ffffff pa 0x0e040000..0x0e040fff size 0x00001000 (smallpg)
D/TC:0 dump_mmap_table:844 type TEE_RAM_RX va 0x82000000..0x820fcfff pa 0x82000000..0x820fcfff size 0x000fd000 (smallpg)
D/TC:0 dump_mmap_table:844 type TEE_RAM_RW va 0x820fd000..0x823fffff pa 0x820fd000..0x823fffff size 0x00303000 (smallpg)
D/TC:0 core_mmu_xlat_table_alloc:526 xlat tables used 1 / 5
D/TC:0 core_mmu_xlat_table_alloc:526 xlat tables used 2 / 5
D/TC:0 core_mmu_xlat_table_alloc:526 xlat tables used 3 / 5
D/TC:0 core_mmu_xlat_table_alloc:526 xlat tables used 4 / 5
I/TC: 
I/TC: Embedded DTB found
D/TC:0 0 core_mmu_set_discovered_nsec_ddr:494 Non-secure memory range [0x80000000 0x82000000]
D/TC:0 0 core_mmu_set_discovered_nsec_ddr:494 Non-secure memory range [0x84000000 0x100000000]
I/TC: OP-TEE version: 4.0.0-dev (gcc version 13.4.0 (GCC)) #1 Fri Oct 20 18:29:31 UTC 2023 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
D/TC:0 0 call_preinitcalls:21 level 2 mobj_mapped_shm_init()
D/TC:0 0 mobj_mapped_shm_init:470 Shared memory address range: 7fc00000, 81c00000
D/TC:0 0 call_initcalls:40 level 1 initialize_bsec()
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[1] = part_number_otp 9bit offset: 0, length: 32
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[2] = package_otp 122bit offset: 0, length: 0
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[3] = otp124 124bit offset: 0, length: 32
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[4] = otp144 144bit offset: 0, length: 256
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[5] = oem_rproc_pkh 176bit offset: 0, length: 256
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[6] = otp260 260bit offset: 0, length: 256
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[7] = oem_rproc_enc_key 336bit offset: 0, length: 256
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[8] = otp352 352bit offset: 0, length: 256
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[9] = otp360 360bit offset: 0, length: 128
D/TC:0 0 initialize_nvmem_layout_from_dt:1416 nvmem[10] = otp364 364bit offset: 0, length: 128
D/TC:0 0 call_initcalls:40 level 1 clk_dt_probe()
D/TC:0 0 clk_dt_probe:207 Probing clocks from devicetree
F/TC:0 0 probe_driver_node:543 Probing fixed_clock on node clk-hse
D/TC:0 0 clk_register:136 Registered clock clk-hse, freq 24000000
D/TC:0 0 probe_driver_node:550 element: fixed_clock on node clk-hse initialized
F/TC:0 0 probe_driver_node:543 Probing fixed_clock on node clk-hsi
D/TC:0 0 clk_register:136 Registered clock clk-hsi, freq 64000000
D/TC:0 0 probe_driver_node:550 element: fixed_clock on node clk-hsi initialized
F/TC:0 0 probe_driver_node:543 Probing fixed_clock on node clk-lsi
D/TC:0 0 clk_register:136 Registered clock clk-lsi, freq 32000
D/TC:0 0 probe_driver_node:550 element: fixed_clock on node clk-lsi initialized
F/TC:0 0 probe_driver_node:543 Probing fixed_clock on node clk-msi
D/TC:0 0 clk_register:136 Registered clock clk-msi, freq 16000000
D/TC:0 0 probe_driver_node:550 element: fixed_clock on node clk-msi initialized
F/TC:0 0 probe_driver_node:543 Probing fixed_clock on node clk-i2sin
D/TC:0 0 clk_register:136 Registered clock clk-i2sin, freq 0
D/TC:0 0 probe_driver_node:550 element: fixed_clock on node clk-i2sin initialized
F/TC:0 0 probe_driver_node:543 Probing fixed_clock on node clk-rcbsec
D/TC:0 0 clk_register:136 Registered clock clk-rcbsec, freq 64000000
D/TC:0 0 probe_driver_node:550 element: fixed_clock on node clk-rcbsec initialized
E/TC:0 0 parse_clock_property:82 Probe parent clock node clk-lse on node rcc@44200000: 0xffff0008
E/TC:0 0 Panic at /usr/src/debug/optee-os-stm32mp/4.0.0-stm32mp-r3/core/drivers/clk/clk_dt.c:85 <parse_clock_property>
E/TC:0 0 TEE load address @ 0x82000000
E/TC:0 0 Call stack:
E/TC:0 0 0x82008180
E/TC:0 0 0x820473cc
E/TC:0 0 0x8203634c
E/TC:0 0 0x820363dc
E/TC:0 0 0x82036418
E/TC:0 0 0x82036418
E/TC:0 0 0x820366b4
E/TC:0 0 0x820490d4
E/TC:0 0 0x82007bec
E/TC:0 0 0x82007f84

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-ComputerSTM32MP257FAK3 custom board with STM64-OS as operating system: https://github.com/DanielMartensson/STM64-Computer

DMårtAuthor

Lead

Hi! @OlivierK

Add this patch to your meta-st layer in https://github.com/STMicroelectronics/meta-st-stm32mp/tree/scarthgap/recipes-bsp/trusted-firmware-a/tf-a-stm32mp

Patch: See attached file

0002-Avoid-LSE-temporary.patch.zip

1 KB

Remember: You need to desolder the LSE crystall from your board if you want to test this bug.

From aef2af78f34f6d9ae91dae9191d8a07b0d419f95 Mon Sep 17 00:00:00 2001
From: noname <noreply@example.com>
Date: Sat, 9 May 2026 10:40:59 +0200
Subject: [PATCH 2/2] Avoid LSE temporary

---
 drivers/st/clk/clk-stm32-core.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/st/clk/clk-stm32-core.c b/drivers/st/clk/clk-stm32-core.c
index 8c2f5a96a..709676217 100644
--- a/drivers/st/clk/clk-stm32-core.c
+++ b/drivers/st/clk/clk-stm32-core.c
@@ -453,6 +453,10 @@ int clk_stm32_enable_call_ops(struct stm32_clk_priv *priv, uint16_t id)
 	}
 
 	if ((ops->is_enabled != NULL) && !ops->is_enabled(priv, id)) {
+		if (id == 5) {
+			WARN("PATCH: clk_stm32_enable_call_ops: ignoring clk id 5 (clk-lse) failure\n");
+			return 0;
+		}
 		ERROR("failed to enable clock id: %u\n", id);
 		panic();
 	}
-- 
2.43.0

After that you need to rename clock-names and clocks to exclude &clk-lse in optee DT.

&rcc {
	status = "okay";

	/* USER CODE BEGIN rcc */
	/* Excluding <&clk-lse> */
	clocks = <&clk_hse>, <&clk_hsi>, <&clk_lsi>, <&clk_msi>, <&clk_i2sin>; 
 clock-names = "clk-hse", "clk-hsi", "clk-lsi", "clk-msi", "clk-i2sin"; 
	st,c1msrd = <2>;

	st,clk_opp{

		st,ck_cpu1{

			cfg_1{
				hz = <1500000000>;
				st,pll = <&pll1_cfg_1500MHz>;
			};

			cfg_2{
				hz = <1200000000>;
				st,pll = <&pll1_cfg_1200MHz>;
			};
		};

		st,ck_gpu{

			cfg_1{
				hz = <800000000>;
				st,pll = <&pll3_cfg_800MHz>;
			};

			cfg_2{
				hz = <900000000>;
				st,pll = <&pll3_cfg_900MHz>;
			};
		};
	};
	/* USER CODE END rcc */
};

0002-Avoid-LSE-temporary-patch.zip

DMårtAuthor

Lead

@OlivierK

More information that LSE-bug is not fixed yet.

mint@mint-ThinkPad-W540:~/Documents/Github/Watermelon-Wine-1A/watermelon-wine-os/layers/meta-st/meta-st-stm32mp-addons$ git log --oneline -n 10
3597fb3 (HEAD, tag: openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18, m/refs/tags/openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18, OpenSTLinux/scarthgap) CUBEMX-STM32MP: configure use of CUBEMX_M33_TZ
c67adfc MACHINE: set m33fw default configuration
9322326 M33TDPROJECTS-STARTER-STM32MP2: set specific CubeMX configuration
9298ce1 MACHINE: enable external tf-m platform profile from CubeMX project
ca6f576 MACHINE: update for CubeMX tf-m platform source
8078626 MACHINE: update for m33fw configuration
9eb0628 M33TDPROJECTS-STARTER-STM32MP2: update folder name
6d5e442 MACHINE: force use of CUBEMX_DTB on extlinux.conf file
d6f276a M4PROJECTS-STM32MP1: update folder name
15be8c7 M33TDPROJECTS-STARTER-STM32MP2: fix missing inherit for CubeMX class
mint@mint-ThinkPad-W540:~/Documents/Github/Watermelon-Wine-1A/watermelon-wine-os/layers/meta-st/meta-st-stm32mp-addons$ cd ..
mint@mint-ThinkPad-W540:~/Documents/Github/Watermelon-Wine-1A/watermelon-wine-os/layers/meta-st$ cd meta-st-stm32mp
mint@mint-ThinkPad-W540:~/Documents/Github/Watermelon-Wine-1A/watermelon-wine-os/layers/meta-st/meta-st-stm32mp$ git log --oneline -n 10
e53460d (HEAD, tag: openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18, m/refs/tags/openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18) Update SBOM on EULA
6caba0f SDK-INFOS: fix typo and align examples
5007f7f CUBE MP2: 1.3.0
df3a656 EXTERNAL-DT: v6.0-stm32mp-r3
db192f8 KERNEL: v6.6-stm32mp-r3
ec7b429 TF-A: v2.10-stm32mp-r3
fb55b14 TF-M: v2.1.3-stm32mp-r2
2d48668 TF-M: v2.1.3-stm32mp-r2
1bfbbd0 U-BOOT: v2023.10-stm32mp-r3
cda5991 OPTEE: 4.0.0-stm32mp-r3
mint@mint-ThinkPad-W540:~/Documents/Github/Watermelon-Wine-1A/watermelon-wine-os/layers/meta-st/meta-st-stm32mp$ cd ..
mint@mint-ThinkPad-W540:~/Documents/Github/Watermelon-Wine-1A/watermelon-wine-os/layers/meta-st$ cd meta-st-openstlinux/
mint@mint-ThinkPad-W540:~/Documents/Github/Watermelon-Wine-1A/watermelon-wine-os/layers/meta-st/meta-st-openstlinux$ git log --oneline -n 10
993e43a (HEAD, tag: openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18, m/refs/tags/openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18, OpenSTLinux/scarthgap) OPTEE ADDONS: License, code of conduct
e21bbfb LICENSE management: manage splitted partitions
b58df11 DCMIPP ISP: histogram
4d95d93 EVENT GTK, WESTON CUBE: add code of conduct
cbe39f5 libcamera: 0.3.0 with ST IPA
66b4af2 PKGGROUP: add libcamera
2a3dd12 INITRD: load kernel module before resize
425bdc4 IMAGE: add M33TD splashscreen and service
c7ad3bd INITRD: use kmod instead of busybox kmod
d5228dc PKG OPTEE: cleanup
mint@mint-ThinkPad-W540:~/Documents/Github/Watermelon-Wine-1A/watermelon-wine-os/layers/meta-st/meta-st-openstlinux$ 
``

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