Alignment of 1-Byte in the custom memory-region

Can you give an example what do you mean by 'are taking 4-bytes'?

In the following situation

char x;
int y;
char z;

The compiler might choose to leave 3 bytes unused after x to enforce a 4-byte alignment for y.

To forcefully pack data and tell the compiler the maybe overridden native alignment of some members you can put them into a packed struct like this (GCC example):

struct tPData
{
 uint8_t A8;
 uint16_t B16;
 uint8_t C8;
 uint32_t D32;
} __attribute__((__packed__));

Thanks @Community member​  for being prompt, that's the backup plan, as I am using the multiple structures hence in your solution there will be multi-level of nested structure which could be less-manageable hence it would be good if we can align a 'custom_section' with 1-byte, suggestions for the same ?

The problem is that sections are related to the linker which can align sections and even (linker generated) symbols by the linker script. But you’ll also need to tell the compiler the proper way to access individual, typed C variables. I think you’ve to tag all your structs packed if really needed and be aware that this might cause a certain performance penalty accessing them in a non-native way.

Also (mis-)aligning sections in the linker script is usually a bad idea because the compiler has no clue. It assumes alignments as specified by the EABI the compiler was built for and generates the corresponding code. But there is also an __align__ attribute ...