STM32 MCUs Embedded software

Looking through the STM32Cube codebase, I’ve noticed a fairly strange but thoroughly consistent coding style. Indentation size is 2 spaces, using space for indentation; bracing style is more similar to Allman’s style rather than K&R and 1TBS. Naming style is also uniform, using CamelCase for external identifiers such as functions, structure fields, and global variables; along with a bit of Hungarian notation here and there (for example, pTxBuffPtr).This style is mechanically consistent through STM32Cube firmwares, drivers (LL, HAL, and CMSIS), code generated by STM32CubeMX, and BSP drivers. Even example projects follow suit.Could STM employees please share with us some documentation or guideline regarding this coding style? Looking for something similar to the Linux Kernel Coding Style and the 

I am working on converting projects from STM32F745VET to STM32U575VGT. Part of the startup routine of the projects is checking for flash errors using the CRC peripheral. The STM32F7 projects initialize a DMA channel in the following way: void MX_DMA_Init(void) { /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); __HAL_RCC_DMA2_CLK_ENABLE(); /* Configure DMA request hdma_memtomem_dma2_stream1 on DMA2_Stream1 */ hdma_memtomem_dma2_stream1.Instance = DMA2_Stream1; hdma_memtomem_dma2_stream1.Init.Channel = DMA_CHANNEL_0; hdma_memtomem_dma2_stream1.Init.Direction = DMA_MEMORY_TO_MEMORY; hdma_memtomem_dma2_stream1.Init.PeriphInc = DMA_PINC_ENABLE; hdma_memtomem_dma2_stream1.Init.MemInc = DMA_MINC_DISABLE; hdma_memtomem_dma2_stream1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; hdma_memtomem_dma2_stream1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; hdma_memtomem_dma2_stream1.Init.Mode = DMA_NORMAL; hdma_memtomem_dma2_stream1

Hello,I’m working on an STM32H757 (Cortex-M7 core, dual-core system) using SDMMC1 + FATFS (CubeMX-generated stack) and I consistently hit a blocking issue: Core issuef_mount() always returns:FR_NOT_READYor the execution breaks inside Error_Handler() depending on build/debug timing. Hardware / system contextMCU: STM32H757 (Cortex-M7, DCache enabled)SD interface: SDMMC1, 4-bit modeDMA: enabled (CubeMX SDMMC DMA configuration)External subsystem: Riverdi TFT display 12.1 inches (LTDC active)FATFS: CubeMX middleware (generic SD diskio template)No RTOS Software architectureSTM32CubeIDE latestHAL SDMMC driver (CubeMX generated)FATFS with sd_diskio.c DMA templateBSP

Follow-on from STM32F030K6T6 microcontroller with Adafruit 2478 display and touchscreen.Hello all, i have a part of code for the touch screen for the 2478 display.I have found an example made with Arduino and i have adapted It for stm32, i would like to know if my code Is fine or It has some issues to fix and what u would suggest me to do. This part Is only for the touch controller of the display but i got several questions, like how many readings i should make from the ADC? rn i do and average basically.  #include "main.h" #include <stdint.h> /* ================= CONFIGURAZIONE ================= */ #define LCD_W 320 #define LCD_H 240 // PIN TOUCH (MODIFICA!) #define

Hi, I am currently implementing an HTTPS server using mbedTLS 3.6.5 and LwIP on an STM32H7S7L8 platform running FreeRTOS.Our mbedTLS configuration  are fully functional, as we already have a stable, working TLS implementation on an MQTT client using the same stack.However, we are encountering an issue during the TLS Handshake phase on the server side after configuring the client sockets to non-blocking mode (O_NONBLOCK). While the listening socket correctly accepts incoming connections, the handshake loop fails.I have attached the relevant snippet of our server thread implementation, including our I/O callbacks.Could you please review our non-blocking I/O logic and handshake loop to see if we missed a specific configuration requirement or state handling for mbedTLS 3.x in server mode?  

I am using the Analog Devices EVAL-ADE9430 Evaluation board for testing one of their devices. The Evaluation board uses the NUCLEO-144 STM32F413ZH processor. I am using the Keil uVision development setup to run and debug code.  I am specifically concentrating on the SPI Bus Driver and the timing. I have no previous experience with STM Devices and how the SPI transfers happen in the processor. so I apologize a head of time.  My question is very basic I am trying to understand how the NUCLEO-144 STM32F413ZH board is transmitting the data over the SPI Bus. What setup is involved and what kicks off the actual transmission in the the HAL_SPI_Transmit() code below. The code i am using is transmitting 8 bits at a time.  The Chip Enable (SS) is set active prior to this code. I see a structure called hspi that has a bunch of parameters that are initialized at line 29 below By single stepping know when line 1

Hello, I am working on a project using DMA and UART HD to communicate between multiple MCUs.  I have an issue where when one MCU starts up, it momentarily interrupts the UART HD bus and sometimes causes a UART and/or DMA error.Since I am using the STM32CubeMX packages for the HAL libraries, I tried to recover from the issue by several means, but I noticed there seems to be no provided method in the stm32h5xx_hal to recover once hdmarx->State = HAL_DMA_STATE_ERROR.  Calling any of the UART or DMA abort functions (HAL_UART_Abort(), HAL_UART_AbortReceive(), HAL_UART_DMAStop()) does not reset the DMA State.  The call chain for HAL_UART_Receive_DMA() eventually checks the DMA State and just returns an error.I have found 2 methods that manage to work around the issue, but I am not satisfied with them because they are not at all elegant:Method 1: Call HAL_DMA_DeInit(), reset the Parent pointer back to huart, then call HAL_DMA_Init().  I feel

Hello all, I've been having trouble with the ADC system on the STM32G071G8U6.  I'm using the STM32CubeMX to generate initialization code.  I have 5 external A/D inputs and it appears I am not getting readings anywhere near the real values, so I have switched to trying to just read the internal reference.  I hope that if I can get the internal reference or the temperature to read correctly, I'll be able to solve the problems with the external inputs. My VDD is provided from a 2.5 volt LDO.  Looking at it with a DVOM, that looks accurate. I am running the A/D at 12 bit resolution and my clcok prescaler is Synchronous clock mode divided by 2.  I have the sampling time set to the maximum available in Cube, 160.5 cycles. I have a polling routine running every 1 second that reads all 5 external and all 3 internal channels. I set the VREFEN and TSEN bits in the ADC CCR register at the end of init and leave them enabled. I r

This is some feedback for the STM32C5 OEMiRoT example provided by ST.This is based on the STM32C5-MCU-HAL2.0.0 pack download 06-05-2026.Attached you can also find the CMake Config files for the example, specifically for the NUCLEO-C542RC board.General Bug Provisioning Python ScriptThe provisioning python script has a small bug when it comes to the prebuild script which adjusts the linker files.These files are compiler specific so the correct adjustment function needs to be called.This compiler dependent code is missing in the `_update_linker_define()` function in `STM32C5-MCU-HAL/rot/rot_provisioning/helper/project/project_generic.py` starting at line 318:linker_path = self.config.get_compiler_linker(compiler) value = f"0x{self.flash_layout.get_flash_layout(define):X}" update_define_in_file(linker_path, define, value)

I am working on UART communication between an STM32H563 and a Raspberry Pi CM4.Currently, I am using UART without hardware flow control (RTS/CTS disabled). During continuous communication, I am frequently getting ORE (Overrun Error) on the STM32 side.Configuration details:MCU: STM32H563Communication: UARTFlow control: DisabledUART mode: InterruptPeer device: Raspberry PiI would like to know:1. What is the best workaround to avoid ORE errors without enabling hardware flow control?2. Is it reliable to use UART communication continuously without RTS/CTS?3. What are the recommended UART settings or software handling methods for STM32H5 series?4. How should ORE recovery be handled properly in STM32H563?Currently, once ORE occurs, The data became lost.

Hello ,I am working on a project with the STM32L562CET6 microcontroller and have encountered an issue with the timer interrupt callback function.   1. I configured TIM6 as the clock source for the microcontroller. Consequently, the HAL_TIM_PeriodElapsedCallback() function is automatically triggered whenever the TIM6 interrupt occurs.   2. Now, I have configured TIM2 for a different purpose, but I noticed that when the TIM2 interrupt occurs, the same HAL_TIM_PeriodElapsedCallback() is triggered.Since the HAL_TIM_PeriodElapsedCallback() is defined with the weak attribute, I understand that I can redefine it in my user code. However, this causes conflicts when multiple timers (like TIM6 and TIM2) trigger this callback.Questions:  1. Is there a way to alias or redirect the HAL_TIM_PeriodElapsedCallback() to separate functions for different timers (e.g., one for TIM6 and another for TIM2)?  2. Is there any othe

Hello, I am working on an SNMP implementation using STM32H753ZI with the LwIP Ethernet stack. Currently, SNMP v1 is working successfully, including trap generation and reception testing using Net-SNMP tools. I am able to send enterprise-specific traps from the STM32 device. Below is the trap code currently working for SNMP v1: void send_temp_fault_trap(void) { static const u32_t enterprise_oid_arr[] = {1,3,6,1,4,1,50598}; struct snmp_obj_id enterprise_oid; enterprise_oid.len = LWIP_ARRAYSIZE(enterprise_oid_arr); memcpy(enterprise_oid.id,enterprise_oid_arr,sizeof(enterprise_oid_arr)); ip_addr_t dst; IP4_ADDR(&dst, 192,168,0,255); snmp_trap_dst_ip_set(0, &dst); snmp_trap_dst_enable(0, 1); static const u32_t msg_oid_arr[] = { 1,3,6,1,4,1,50898,10 }; static struct snmp_varbind vb; static struct snmp_obj_id msg_oid;

Good day,We are using a composite USBX device class combining CDC and MSC over USB Full Speed, built on X_CUBE_AZRTOS-H7 version 3.3.0 (USBX 6.4). During testing we discovered that a certain Windows PC sends a MODE SELECT(10) command (opcode 0x55) and causes an endpoint stall.After a rather long debugging session, it was found that the USBX source _ux_device_class_storage_mode_select() is explicitly not implemented — it stalls the OUT endpoint, UX_FUNCTION_NOT_SUPPORTED (which is not checked in the thread) and never recovers:

Hello,I've been adapting the DRP1M1 USB-PD DRP reference design for use on a custom STM32U5A9 Board, and have run into an issue where it seems like ST's compiled USBPD library just stalls during negotiation as a SRC device.Hardware: STM32U5A9, custom board with TCPP03-M20Library: USBPDCORE_PD3_FULL_CM33_wc32.aConfiguration: DRP, PD3.0## ProblemOperating as SRC, the PE state machine sends ACCEPT in response to a REQUEST but never advances to PE_SRC_TRANSITION_SUPPLY. PS_RDY is never sent and the port partner eventually triggers a hard reset.## What We Have Verified**Protocol layer is working correctly:**- SOURCE_CAPABILITIES sent and GOODCRC received- REQUEST received and GOODCRC sent- ACCEPT sent and GOODCRC received- All confirmed on protocol analyzer**All DPM callbacks returning correct values:**- USBPD_DPM_EvaluateRequest() returns USBPD_ACCEPT (verified via debugger)- USBPD_PWR_

Title edited to clarify that the "onboard PHY" refers to a Nucleo-H753ZIi have may issues related to implement the ethernet on stm32h753zi mcu like i am not able properly configure the mpu regions and linker script and its ethernet.c file ...and also have issue related to ping the static ip...if any supporting link related to this issue can be provided..that might be helpful

0x0BF97000 (system bootloader base per AN2606): the jump appears to succeed (In Debug reaches the bootloader region), but execution then breaks at an address inside the bootloader ROM with no further progress and no USB enumeration. The hardware boot path works correctly. The problem is purely on the software-jump path.I created an empty project in sample you can download and test it. I also attached my option bytes (i think everything is default).MCU: STM32H573 (also tested h523)/** ****************************************************************************** * @file dfu_jump.c * @author Uğur Tümer * @brief See dfu_jump.h. Implements the magic-word + soft-reset path into * the STM32H523 system bootloader (USB DFU on PA11/PA12). ****************************************************************************** */ #include "dfu_jump.h" /**

Hello everyone,I am developing a cellular IoT device using STM32L4 + SIM7600G-H 4G module. The goal is to create a highly reliable driver that can handle every possible disconnection, network drop, MQTT event, and recovery scenario without losing data or getting stuck.Requirements:Heavy use of UART DMA (Circular RX buffer + IDLE line detection)Full finite state machine for modem management (Power on → Network → PDP → MQTT → Operational → Recovery)Robust parsing of all URCs (+CMQTTDISC, +CLOSED, registration changes, etc.)MQTT communication with ThingsBoard (telemetry, client attributes, shared attributes, RPC, firmware OTA/FOTA)Reliable reconnection logic with exponential backoff, message queuing during offline periods, and modem watchdog (power cycle on repeated failure

I would like to use the board's built-in microphone to display audio data visualization on an LCD screen. I want to add more display modes later, but at the moment I only have basic waveform time domain display.I use the built-in microphone to record audio, which I then convert to PCM using PDM2PCM middleware. However, there seem to be no correlation between the sound and the pcm values. Whether I speak, turn the music on, or do nothing at all - pcm values are about the same.Moreover, every position in the PCM buffer hovers around the same value. For example, some positions are about ~-11000 no matter what, and the other are about ~20k no matter what. So, the audio visualization is almost flat with some random noise.I assume that there is something wrong with how I use the mic or pdm2pcm. The I2S and middleware settings

Hello, I was able to successfully implement a way to read motor status and various parameters through UART on putty with my B-G431B-ESC1. However, when I tried following tutorials to add a way to also control the motor status (turning it on and off), I keep getting no response from the motor when I type commands in putty. I don't know if something is wrong with my code or with the way I set up putty, but im leaning more towards the code since the TX part works well. Im quite a beginner with this so maybe its something very ***, but i really cant wrap my head around it. Linked to the post is my main.c. thank you.

Hello, I am developing a project using the TCPP03 (X-NUCLEO-DRP1M1) and the ST USB-PD stack on an STM32G0 with FreeRTOS. I am concerned about the thread safety of the FLGn interrupt handling. In the standard BSP examples, the EXTI interrupt calls BSP_USBPD_PWR_EventCallback(). I2C Contention: Since BSP_USBPD_PWR_EventCallback() performs blocking I2C reads (ReadFlagRegister), what prevents the PE_Task or CAD_Task from attempting an I2C transaction at the same time? ISR Safety: In an RTOS environment, is it considered safe to perform blocking I2C calls inside the FLGn ISR, given the risk of 

Hello, I am following this guide:How to integrate TouchGFX and camera middleware on an STM32N6570-DK and seem to be getting an I2C1 undefined reference (below).  Is there something I need to change?  I have I2C2 enabled in my .ioc, but don't see anything about enabling I2C1C:/TouchGFXProjects/VisionControlboard/STM32CubeIDE/Appli/Debug/../Middlewares/stm32-mw-camera/cmw_camera_customized.c:1951:(.text.CMW_CAMERA_IMX335_Init+0x144): undefined reference to `BSP_I2C1_Init' C:/ST/STM32CubeIDE_2.0.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/bin/ld.exe: C:/TouchGFXProjects/VisionControlboard/STM32CubeIDE/Appli/Debug/../Middlewa

I need to use an external loader via single SPI for a project. Despite performing all the necessary steps. I'm getting an error through CubeProgrammmer./* Entry Point */ ENTRY(Init) /* Generate 2 segment for Loader code and device info */ PHDRS {Loader PT_LOAD ; SgInfo PT_LOAD ; } /* Highest address of the user mode stack */ _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ /* Generate a link error if heap and stack don't fit into RAM */ _Min_Heap_Size = 0x200; /* required amount of heap */ _Min_Stack_Size = 0x400; /* required amount of stack */ /* Specify the memory areas */ MEMORY { RAM (xrw) : ORIGIN = 0x20000004, LENGTH = 112K-4 } /* Define output sections */ SECTIONS { /* The startup code goes first into FLASH */ .isr_vector : { . = . + 0x1FC; . = ALIGN(4); KEEP(*(.isr_vector)) /* Startup code */ . = ALIGN(4); } >RAM :Loader .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >RAM .ARM : { _

Hi,I spent a few days trying to make Ux_Device_HID and Ux_Device_HID_Standalone to work on Ubuntu with latest versions of CubeMX and Cube IDE (STM32CubeIDE Version: 2.1.1, STM32CubeMX 6.17.0)The only way I managed Ux_Device_HID to work on NUCLEO-H723ZG was by the following steps:start MXselect example for nucleo board and start project directly in CubeIDE (not doing anything in CubeMX)compile project in CubeIDE without any changesflash to the board and it worksHowever, if I want to open it in CubeMX and generate code even without any changes - the resulting code does not work at all. I used git to do diff and changes are all over..Of course I could do changes in CubeIDE directly without nice MX interface, but I kind of like it simple ))Anyway, could someone form ST explain why *.ioc file from example cannot be used with Cube MX to generate a working code?

I am devoloping a low-power motion detector device using the STM32L071 mcu.The PIR sensor wakes up the system through wake-up pin, and after completing the RF packet transmission, the system goes back to sleep. In other words, I have a system that continuously switches between standby and run modes.How should I implement the watchdog in such a system ?I don't want the watchdog to keep counting while the MCU is in standby mode. I only it to run during run mode.My code like this (bare metal): int main(void) { /* USER CODE BEGIN 1 */ config_getresetflags(); /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN

Hello,In this file, the line:USBx_HC((uint32_t)ch_num)->HCSPLT |= USB_OTG_HCSPLT_XACTPOS_Pos;wrongly alters bits 1 to 3 of register HCSPLTThat can be fixed simply by removing this line, since middle payload is encoded by bits 00 in the XACTPOS field.