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STM32H743VGT6 how to use slave I2C+DMACurrently, this usage is fine. However, when using the DMA function, it will trigger an ER interrupt.HAL_I2C_Slave_Seq_Receive_DMA, How to use it? Are there any examples?// 从机地址匹配回调函数 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) { if (hi2c->Instance == I2C1) { if (TransferDirection == I2C_DIRECTION_TRANSMIT) { Rx_len = 0; memset(I2C_rxBuffer,0,4); HAL_I2C_Slave_Seq_Receive_IT(&hi2c1, I2C_rxBuffer, 1, I2C_FIRST_AND_LAST_FRAME); } else { HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, I2C_txBuffer, Tx_len, I2C_FIRST_AND_LAST_FRAME); } } } 

I'm using the latest library provided by the STM32Cube_FW_G0_V1.6.3, specifically STM32Cube_FW_G0_V1.6.3\Drivers\CMSIS\DSP\Lib\ARM\arm_cortexM0l_math.libbut when using IAR 9.20 I'm having the warning Warning[Lt009]: Inconsistent wchar_t size arm_sin_f32.o(arm_cortexM0l_math.lib) and 1 other objects in arm_cortexM0l_math.lib have wchar_t size 16 bits my_file.o and 54 other objects, some of them in rt6M_tl.a and 5 other libraries have wchar_t size 32 bits How do I avoid the mismatch?I would like to avoid to link the source code for the cortex M math library and compile it myself.

I wonder why this is happening after U-boot has booten up?It seems that something is NULL. D/TC:? 0 tee_ta_close_session:484 Destroy session Error: eth1@482c0000 address not set. D/TC:? 0 tee_ta_init_session_with_context:562 Re-open trusted service a8cfe406-d4f5-4a2e-9f8d-a25dc754c099 F/TC:? 0 pta_scmi_invoke_command:404 SCMI command 0x3 ptypes 0x3 F/TC:? 0 pta_scmi_invoke_command:404 SCMI command 0x4 ptypes 0x651 D/TC:? 0 tee_ta_close_session:465 csess 0x821301f0 id 1 D/TC:? 0 tee_ta_close_session:484 Destroy session No ethernet found. �7�[r�[999;999H�[6n�8No EFI system partition No EFI system partition Failed to persist EFI variables D/TC:? 0 tee_ta_init_pseudo_ta_session:303 Lookup pseudo TA ab7a617c-b8e7-4d8f-8301-d09b61036b64 D/TC:? 0 tee_ta_init_pseudo_ta_session:315 Open rng.pta D/TC:? 0 tee_ta_init_pseudo_ta_session:330 rng.pta : ab7a617c-b8e7-4d8f-8301-d09b61036b64 F/TC:? 0 plat_prng_add_jitter_entropy:7

Hello,I start testing with the STEVAL-M25R16B Board and use this Time the self compiled Demo from ST to test it. All works find.Then i made an own PCB with Reader IC  and Antenna on it and connect it to your MCU /Display Board.The Board is connected to 3.3V, GND and the SPI / IRQ Lines. The Antenna on my PCB is very small, only 21x26mm. Inductance measured with Siglent VNA 770nH.( 0.5mm Track Width, 0.3mm Distance, 3 Turns) The from your Tools calculated Values and my final Values after tuning differ..My Result: L=270nH, Cemv 680pF, Cs 220pF, CTune 430pF, Rs 0.68R I tuned the Circuit using my VNA and get a Reading Distance of about 25mm for 14443 Keyfobs and Cardsand about 6cm for ISO15693 Card.This all works fine.  Smith Chart looks perfect.The Rx Voltage is about 1.5Vpp. The Voltage Divider Capacitors are 33p/120p.ST25RProblem: Tags are working but in

Hi everyone,I am encountering a HCI_HARDWARE_ERROR_EVENT with code 0x02 (BlueCore time overrun error) on STM32WB devices.Key observations:Issue is observed only on some units, while others operate normallyAll devices use the same firmware, BLE stack, and FUS versionsAffected units show unstable BLE behavior (disconnects or degraded performance)Validation performed:Tested with STM32 reference example (BLE_p2pServer)The issue is still reproduciblePCB layout and hardware design have been reviewed and validatedNo application-specific changes involved during testingQuestions:Root causeWhat typically triggers a BlueCore time overrun at the controller level?Does this point more toward hardware timing issues (clock accuracy, RF timing), or internal controller or stack conditions?Unit variationHa

We are a bachelor project group developing a BLE Direction Finding handheld "tracking compass" using AoA on STM32WB09 devices.We have reached a stage where BLE communication, CTE reception, antenna switching, and IQ report generation all appear functional, but the resulting IQ data seems physically incorrect and causes unstable angle estimation.We would appreciate suggestions on possible RF or IQ-processing issues we may have overlooked. Environment:MCU:PCB1) STM32WB09KE (Compass)PCB1) STM32F446RE as processing unitPCB2) STM32WB09KE (Tracking Tag)STM32CubeIDE Version: 2.1.0Toolchain / IDE: STM32CubeIDE. In this page, ST provides a .zip folder containing

What does the appearance of KF50BD-TR look like ? Does it have pin 1 marker?Can you provide the relevant drawings?

Hi, I'm using the STM32C071K8U6's built-in USB DFU bootloader for one-time production programming. After flashing, PA11/PA12 (USB D+/D-) are used as regular GPIO outputs to control two P-MOSFETs (each with their 100kΩ gate pull-ups to 4.2V).   The USB functionality is not used by the end customer, but the USB connector remains accessible for charging. This means a PC's USB cable may be connected during normal use allowing for potential signal injected into those traces resulting into the PMOS being turned on/off by the PC if it detects there is a USB device connected and tries to enumerate it.   The two core issues: a) When a user plugs into a PC for charging, we need to guarantee the host does not attempt enumeration, and that nothing the host does on D+/D- interferes with our GPIO-driven MOSFET gates. b) because the&nb

The STM6905 datasheet says in Table 2 that there is an internal 10k pull-up on RST#, which seems wrong since that's an open-drain output. Then in Section 2.6 and in Section 3 it says that an external pull-up to VCC should be used.

Hello,I would like to ask about the UFQFPN32 package footprint for the STM32G491KEUx device.We are using the following part:Part number: STM32G491KEUxPackage: UFQFPN32While reviewing the datasheet and package information, we found that the actual UFQFPN32 package appears to have an exposed pad (EP) on the bottom side of the package.However, in the datasheet/package information we reviewed, the UFQFPN32 package information and footprint example do not seem to include the EP or the EP land pattern.In particular, the UFQFPN32 package information is shown in the document from page 166 to page 168, but we could not find any information regarding the exposed pad or the recommended PCB land pattern for the EP.Could you please confirm the following?

Hi everyone, I'm facing issues connecting an external debugger to the NUCLEO-H7S3L8 board (STM32H7S3L8). Current Setup: Board powered via CN5 (ST-LINK USB) JP1 closed (to disable on-board ST-LINK) External debugger connected to CN1 (MIPI20 connector) SWD mode at low speed (500 kHz to 1 MHz) Correct power sequence: Power CN5 first → wait for COM LED (LD8) to stabilize → then connect external probe What I have already tried: BOOT0 = 1 (jumper on CN11[5-7]) to enter bootloader mode and halt using external debugger Internal

Hello All,Apologies in advance for sounding like a noob (that is because I am). I am building a wearable device as a hobby, and I need a 6-axis gyroscope with IMU. Ideally, the device should have more than one IMU, but considering that I have absolutely no idea how to even assemble the device, I am reaching out to this forum to hopefully get an initial idea of what it is I need, so as to hopefully set me off in the right path. The sensors I am thinking in using: Initially I have been looking at ASM330LHHTR and A3G4250DTR, strictly because they are small. The idea I have is to begin testing with a simple setup connected to power, but to eventually make it battery-powered.A bit more information about what I want to measure: eventually I want to set up a strip of these IMUs in a straight line, and have them measure at the same time, and feed it to something like a raspberry pi so as to transm

Hi STM teams , i have developed a custom NFC board using the STM32L476RCT6 and the ST25R3916B NFC reader, based on the reference design of STEVAL-D25R16B (https://www.st.com/resource/en/schematic_pack/steval-25r3916b-schematic.pdf). I am using an external sticker antenna (Manufacturer Part Number: V2089-013-A-01). Currently, the board detects only the STEVAL-SMARTAG2 NFC tag card (https://www.st.com/resource/en/schematic_pack/steval-smartag2-schematic.pdf), while other NFC cards are not being detected. However, when I connect the custom NFC board to the DK antenna, it successfully detects the STEVAL-SMARTAG2 card as well as all other NFC cards. so i think issue may be sticker antenna

 Hello everyone,I am learning STM32 embedded development using an STM32 Blue Pill (STM32F103C8T6).I installed STM32CubeIDE, but when I go to File -> New, I only see:STM32CubeIDE Empty ProjectC ProjectC++ ProjectSTM32 CMake ProjectI do not see the normal “STM32 Project” option.Because of this:.ioc file is not being generatedCubeMX integration appears to be missingAdditional details:STM32CubeIDE version: 2.1.1Windows 11STM32 Blue Pill boardST-Link is detected successfully in Device ManagerI already tried:reinstalling packsrefreshing package descriptionsrestarting the IDEreinstalling STM32 packagesBut the issue still exists.Could someone please guide me on:

Product/Tool: STM32CubeProgrammer CLI v2.19.0Target MCU: STM32U385RG-Q (Nucleo-U385RG-Q board)Connection: SWD, mode=UR (Under Reset)TZEN: 0 (non-secure)================================================================================SUMMARY================================================================================We are unable to program a full 16-byte OTP row using STM32_Programmer_CLI.Only the first double-word (8 bytes) of a row can be written. Any attempt toprogram the second double-word of the same row fails silently (word remains0xFFFFFFFF) or is rejected by the flash controller, even though the row shouldnot be locked until both double-words are programmed.Per the reference manual, the OTP lock granularity is one 16-byte row(2 double-words). We expect to be able to program both double-words within arow independently (each in a single operation), provided neither has beenwritten pr

  Hello ST Team, I developed a custom USB DFU HOST class on an STM32F446ZE. I soldered a USB-C cable directly to the D+/D-, 5V and GND pins. The Problem: The stack works correctly for transfers up to 128 bytes. However, when I set phost->Control.setup.b.wLength.w > 128 (e.g., 192 bytes) and call USBH_CtlReq, the code enters an infinite loop inside USB_WritePacket. I have traced the execution line-by-line, monitoring the HCTSIZ register values: size (Transfer Size) and cnt (Packet Count). Below is the detailed trace comparing a working 128-byte transfer vs. a failing 192-byte transfer. 1. Successful Scenario: Transferring 128 Bytes Initial State: size = 128, cnt = 2. Loop Iteration 1: i=15: USBx_DFIFO written. Register updates: size = 64, cnt = 2. i=

Hello, I have a device with a variable message stream in UART and there is the issue that I cannot know when it's stream ends due to gaps (so a single ReceiveIdle won't work). The device has clear framing via an interrupt so I use that.The final system will have limited DMA channels so keeping a ReceiveIdle always set is wasteful.As such there is the following workflow:HAL_GPIO_EXTI_Callback gets a signal there is a new message. That arms the DMA listener. On DMA callback, HAL_UART_Receive_IT is armed to catch possible remainder of message.On HAL_UART_Receive_IT it arms another DMA to get the rest of the stream (instead of doing a byte by byte interrupt, which is slow)We get another callback and stop the DMA/IT or we loop on IT and DMA.The issue is if this workflow is safe? Is there an issue arming DMAs on callbacks or IT on DMA callbacks?Thank you&nb

The issue feels really simple, and it's easy to do on N6. At the core, I am running out of MPU regions as there are only 8 available. So it would be nice to have a small chunk of SRAM, where privileged code can share data with unprivileged code. Say a status or something like this.GTZC only controls both read and write. So I cannot say that a single 512 byte block is read/write for privileged code, but read only for unprivileged.  

I am currently experiencing the following problem on Windows 11:I have STM32CubeCLT 1.20.0 installed, respective directories are correctly added to the front of system PATH, no problems when (cross)compiling with CMake, Ninja and arm-none-eabi toolchain for an STM32 target.I have to run unit tests on my host machine, for that i use MSYS2 with the UCRT64 environment. To integrate into a common CMake script, i cannot only use the MSYS2 environment from the UCRT64 shell, i therefore added C:\msys64\ucrt64\bin to the back of system PATH.With this constellation, i cannot use the gcc provided by MSYS2 UCRT64. I used this simple setup:main.c#include <stdio.h> int main() { printf("Hello, World!\n"); return 0; } CMakeLists.txtcmake_minimum_required(VERSION 3.10) proje

Title updated to better reflect the root problem; was originally 'Riverdi 12.1" + TouchGFX 4.25 + FATFS not working'Hi everyone,I am working on a Riverdi 12.1" display board based on STM32H7 with TouchGFX 4.25 generated project.Environment:TouchGFX 4.25STM32CubeMX generated projectSTM32CubeIDERiverdi 12.1" boardSTM32H7FreeRTOS enabledDebugging with ST-LINKProblem:BSP_SD_Init() returns MSD_ERROR_SD_NOT_PRESENT.In main.c:uint8_t res; res = BSP_SD_Init(); risultato = res; if(res != 2) { Error_Handler(); }The value stored in risultato is:MSD_ERROR_SD_NOT_PRESENTAdditional important behavior:Whe

this thread is split from this thread hello Last question, I just saw the example but it's not for the STM32H755ZI-Q series, are the examples still compatible with this STM32H755 series? Thanks

Hello Team,Good Day !After Cloneed our two version of Hardware ( STM32F3 Series based ) by compititor , we are now more focused on Hardware Security aspects.Can you Pls Suggest which STM32 MCU is the MOST Secure among all available MCU ? Considering Firmware Protection / physical  Attacks ? I would appriciate , if Higher Level Architecture with Device name is Provided.We are also open for Paid Consultancy if any 3rd party ready to help... Regards ,Bhupendra

Hi, I'm searching for the best  Rx sniff mode as suggested in AN6362: I'm able to use carrier sense (RSSI_THR, CS_F interrupt) and SQI (SQI_THR, SYNC_VALID_F interrupt) but PQI never works.The MCU is in WFI state, sequencer not used.I have changed the value of  PQI_THR but PQI_INFO is always zero and the PREAMBLE_VALID_F interrupt is always received a few microseconds after CS_F interrupt.Thank you in advance! 

Dear STM Engineer, thank You very much for Your great effort  for the new STM32V8. My comments on the features after looking into stm32v8-presentation.pdf: - STM32V8 will have a ETH-Gb-MAC with PTP, that is great news for applications in the field of scientific instrumentation. -- I am missing PTP-Timestamp-capture-peripherals to generate PTP-precise timestamp input-pulse captures on external events. So triggered by one GPIO input-pulse-edges  (or better several logic-combined GPIOs, at least two to have one "gating), a timestamp (64 Bit or more?) should be stored, including in its timestamp-word at least two (better four or more) GPIO Input-states: state high/low AND edge falling/rising. We would need as many as possible of these PTP-Timestamp-capture-peripherals as possible, e.x. 16 or more of them per MC. Would You consider to include such PTP-Timestamp-capture-peripherals into STM32V8? - -  I am missing PTP-ou

I am trying to do multidrop with STM32WL5MOC and STM32U031. I have some issues:[1] When WL5MOC is the only active MCU in the circuit (U0 is not powered on) I cannot connect M4 core using TargetSel=0x04970041 option:I can connect to M0+ core using tagetsel (STM32_Programmer_CLI -c port=swd TargetSel=0x04970041 ap=1 mode=hotplug)If I try the same with ap=0, CLI cannot connect to M4 core and retires with ap=1 and then connects M0+ core againThere is no issue when not using targetsel option and U0 is disconnected. I can connect both WL5 cores with ap=0 and ap=1 options.[2] If I power on U0 and try multidrop, I cannot connect any of the cores of WL5:I can connect U0 with targetsel option(STM32_Programmer_CLI -c port=swd TargetSel=0x04590041 ap=0 mode=hotplug).. At first CLI cannot connect with ap=0 and retries with ap=1 and then connects.Interestginly If I try ap=1 directly,