STM32 MCUs

Hello,I've just received my fresh new SMT32H747I-DISCO dev board and I wanted to try some samples.I have some experience deveolping on embedded Liuxes, but this is my second MCU (the first one was a Raspberry PICO, don't know if this counts). I am using a MacBookPro with Apple silicon (M3) and MacOS 14.4What I have done:read the specs, configured the board to get power and STLink from CN2 (as is by factory)installed every tool available:STM32CubeProgrammerSTM32CubeIDE (which also installed a SMTLink server nstall ,st-stlink-server.2.1.1-2, installed successfully ) even STM32CubeMXconnected the board to a USB-C port on my Mac via a USB-C to USB-B mini cable2 times out of three the main led (LD10?) starts red, then flashes red/green then stays green. The other times the board LED stays red. In either case, nothing on the LCD display. to me the board seems waiting.On the former occurrences,

I am not able to erase a section of internal flash of the NUCLEO-H633RE.Using the debugger I see the Flash is all 0x00 before I try to erase.  I verify that Flash is not locked i.e.if (*FLASH_NSCR && LOCK) { *FLASH_NSKEYR = 0x45670123; *FLASH_NSKEYR = 0xcdef89ab; }then I try to erase a section of Flash i.e./* ************************************************************************* */ /* */ /* EraseFla - Erases 8K page of Flash, Waits for Flash not busy. */ /* Inputs: uint32_t page holds the page to erase. */ /* Outputs: None */ /* */ /* ************************************************************************* */ void EraseFla(int EraPage) { while (*FLASH_NSCR && BSY){}; n = *FLASH_PRIVCFGR; // just testing n = EraPage >> 7; if (n && 0x0800) { n &= 0x07C0; n |= 0x80000004;} // BKSEL and SER else { n &= 0x0

English language:STM32H7 Ethernet + DMA + Cache Explained + LwIP (EN) One of the most common sources of confusion when working with STM32H7 microcontrollers and Ethernet (via LwIP + HAL ETH) is data cache (D-Cache) behavior.When using DMA (like Ethernet MAC DMA), if D-Cache is enabled (which it is by default in STM32H7 projects), you must manage cache coherency manually. Otherwise, the DMA peripheral and the CPU will not agree on what data is in RAM.I encountered this exact issue myself and spent significant time identifying the root cause. Since many others using STM32H7 are likely to face this same problem, I'm sharing this explanation to help save your time and effort.Problem:If you fill a pbuf->payload buffer with data and send it using HAL_ETH_Transmit() without cleaning the D-Cach

Hello, I am trying to setup TIM5 channel 1 to output a signal on its output pin. I generated the code using STM32CubeMX2. I am getting an assert failed during initialization.mx_system_init() calls mx_tim5_init() which calls HAL_TIM_OC_SetConfigChannel(): oc_config.polarity = HAL_TIM_OC_HIGH; oc_config.idle_state = HAL_TIM_OC_IDLE_STATE_RESET; if (HAL_TIM_OC_SetConfigChannel(&hTIM5, HAL_TIM_CHANNEL_1, &oc_config) != HAL_OK) { return NULL; } In HAL_TIM_OC_SetConfigChannel function assert fails at the following line: ASSERT_DBG_PARAM(IS_TIM_OC_OVERRIDE_STATE(p_config->override_state)); ASSERT_DBG_PARAM(IS_TIM_OC_BREAK_MODE(p_config->break_mode));The value of the override_state shown by the debugger  is: (HAL_TIM_OC_OVERRIDE_SET | unknown: 0xfa). If I comment out the assert it will assert on the next l

Hi all, Thank you for looking at my thread.I have started a proof of concept project that runs ThreadX and TouchGFX on a custom QSPI display on STM32F7. I noticed from the documentation at https://support.touchgfx.com/docs/development/touchgfx-hal-development/scenarios/scenarios-configure-rtos that the following warning is highlighted.Now indeed when I generate the code from CubeMX the MX_TouchGFX_Init is n

Hello everyone,I am developing a UI using TouchGFX on a custom board based on the STM32F767. I am encountering visual artifacts during screen updates.As seen in the attached video:In the date selection wheel, the text overlaps, tears, and leaves ghosting artifacts during scrolling.The first menu ("Date & Time", "Language" etc.) is inside a ScrollableContainer with a ListLayout. Initially, the text is corrupted. However, as soon as I scroll this container, the artifacts disappear completely and the screen draws correctly.System Info:MCU: STM32F767GUI: TouchGFX (Version: [Sürüm] )Memory: Framebuffer is located in [SDRAM vb.]Configuration: MPU is ENABLED, D-Cache is ENABLED.What could be causing

Hi everyone,I'm experiencing a very specific bus/clock issue on a custom board using the STM32U5G9ZJ (and also tested on STM32U5F9ZJ).The Problem: My display (320x240, RGB565 via LTDC) only works if the HSPI1 peripheral is enabled in CubeMX. As soon as I disable HSPI1 (which I need to do to free the PH9 pin for power management reasons), the screen turns grey, even though the LTDC settings remain unchanged.Key Technical Details:Data Location: All assets (images/fonts) are stored in Internal Flash memory. The HSPI/OctoSPI bus is NOT used during the display process.Memory Status: In Debug mode, I can confirm via the Memory Browser that the Frame Buffer (located at 0x20025800) is correctly populated with pixel data.LTDC Behavio

Hello,I want to know the DAC output buffer maximum safe output current before damaging the output buffer. I know that it's not possible to get the output swing mentioned in the datasheet under this condition.The datasheet maximum ratings doesn't state it for the DACs, and from the normal ratings only the current to keep the maximum output voltage around VREF+ can be calculated. So, either I wasn't able to locate the information in the datasheet (which is hopefully the case) or it isn't mentioned there at all.I'm using a STM32U083 device, datasheet https://www.st.com/resource/en/datasheet/stm32u083kc.pdfRegards

I created the project in TouchGFX 4.26.0 Designer, modified pins with CubeMX_17, and attempted to debug the project in STM32CubeIDE 2.1.1. The example I used was Flex Button Example.Kit is STM32U5G9J-DK2.When I attempt to set up a debug configuration in CubeIDE, I am unable to select a project. This project compiles and works when I flash it to my kit through TouchGFX. Could there something wrong with my project structure? Thank you. 

Hello, Using STM32F4 USB USB_OTG_HS, PCD_SPEED_FULL for USB Device CDC we are transmitting data to Host.After some minutes the transmission gets stuck. Although the TXFE IRQ is received, no XFRC IRQ happens and consequently TX state is not set back to 0. The DTXFSTS counter stays on 0x40 (empty is 0x80).The USB trace looks normal. When the problem occurs the peripheral answers all IN Transactions with a NAK.Why does the peripheral not transmit the data but does NAK instead?The problem is seen with different types of Hosts (PC or other embedded devices).Attached Log Output and Screenshot of the Trace.HAL 2.4.2 us used. The TxState fix was applied (Enable/Disable IRQ moved to USBD_CDC_TransmitPacket)Many thanks for any help.

For our product we use sliders to set parameters in our software. Some parameters effect the range of others at runtime. Sometimes the allowable range of the values is limited to a single value. In such a case min equals max. This leads to an assert error in the simulator and undocumented behavior on the target.We would like to see support for min=max. One way to implement it is to show the Indicator Image in the center (or left),  disable sliding, and set the value=min=max. This would simplify our firmware since we wouldn't need to handle it as a special case.I also added the tag bug-report since undefined behavior on the target is unacceptable.

Hi@all Curently i was using STM32F407VGTX but i found that there is no support of snmpv3 on this board so i decided to go for stm32H753ZI. Kindly please suggest that does this board supports snmpv3 or not and if not please suggest me the board that supports snmpv3 i want to deploy in my products 

Hello, I am experiencing an I²C communication issue between my MPU6050 sensor and an STM32F429I-DISC1 board. The sensor is properly powered at 3.3 V, and I have already verified its operation with an ESP32 board (communication is successful). However, with the STM32, no communication is established. Actions performed: Configured I²C1 on the STM32 (tested in fast mode at 400 kHz and standard mode at 100 kHz) Verified the MPU6050 address (default 0x68, AD0 pin connected to GND) External pull-ups: tested with and without 4.7 kΩ resistors on SCL and SDA Checked physical connections (SCL to PB6, SDA to PB7 for I²C1 on the board) Configured the LCD screen Observed behavior: The I²C scan does not detect any address Blocking point: The same sensor, using the same basic I²C code, works perfectly on the ESP32. Therefore, the sensor is not the cause. The issue appears to be related to the I²

Hello,I currently need to transfer ADC data from a nucleo-n657x0Q to a PC. I've configured the stm32n6 using ST's example on GitHub, but I still don't know how to use the `ux_device_class_cdc_acm_write` function to transfer the data.Can anyone guide me on how to transfer data using this USB HS?

Hi,This is my first time using an STM32N6 without internal flash, and since I am right before handing over files for artwork, I would appreciate it if you could check if the power lines and XSPI memory connections are correct.I have searched around a lot, but since it is my first time, I feel a bit nervous, so please let me know if everything is correct.>I looked it up and found that to boot via Nor-Flash (quad), I need to connect XSPI1 to XSPIM_P2. Also, since I try to connect the 16-bit PRAM in DTR without DQS mode, I connected it as XSPI2->XSPIM_P1. Is this correct? I really need to BOOT via Nor-Flash and use PRAM after that. (swapped mode? in CubeMX)

Hello ST Community, I am currently evaluating an architecture based on STM32H7 series MCUs (STM32H743 / STM32H7A3) and would appreciate guidance on external memory scalability and best practices. Target Architecture Bootloader in internal Flash Main application stored and executed from external OctoSPI NOR Flash (XIP mode, memory-mapped at 0x90000000) External RAM for buffering (TCP/IP, DLMS stack, application data) Planned External Memory External NOR Flash via OctoSPI (large size, potentially >512 Mbit) External RAM target: ~256 MB (initial requirement)

Hello Community, I am working on an STM32N657X0H3Q project and have successfully configured both USBX and X-CUBE-FREERTOS (v1.4.0) within the same Application runtime context using CubeMX. My goal is to implement a USB CDC Composite device. Since USBX traditionally relies on Azure RTOS (ThreadX) for its RTOS primitives, I am seeking the recommended best practice  for running USBX on a FreeRTOS-based system.   Should I configure USBX in standalone mode? If running USBX in Standalone mode, what is the best way to handle thread safety when accessing the USB CDC interface from multiple FreeRTOS tasks?  Are there any known issues using the USBX Composite Builder when the underlying kernel is FreeRTOS instead of ThreadX?

Working on STEVAL-SPIN3201 board and need help in expected low-speed torque performance using Field-Oriented Control (FOC).System Configuration:Motor Driver Board: STEVAL-SPIN3201Motor: 3-phase BLDC (Rated torque=0.25Nm)Position Feedback: Hall sensorsObserved BehaviorDuring testing, I observed that the motor struggles to start at lower commanded speeds when a load is applied.Load: 0.05Nm1000–1500 rpm: Motor struggles to start.2000 rpm: Motor starts reliably.Load: 0.1 Nm1000 rpm: Motor does not start.1500–2000 rpm: Motor struggles to start.3000 rpm: Motor starts reliably.&n

Hi, You know, there are some strict requirements about MCU used in optical module or production,  which include1. Size and package2. Internal resource3. IO amount, especially  ADC and DAC with >= 12bit resolution which be used to monitor signal and control4. Power efficiencyCould you please recommend latest ST MCU which are used widely in ultra high-speed optical module such as OSFP and NPO? or, share me roadmap about ST MCU series used in optical production? Thanks in advance!Best regards!Jason

I have this Riverdi board with a STM32H757XIH6 microcontroller. I have been using it consistently and loading touchgfx programs on it.  Today I was trying to use the 40 pin header and program one of the gpio pins on it to act as a gpio output. I put an led on a ground and the PA4 pin, which was the pin I was using on the 40 pin header, to verify the toggling code was working.  Nothing happened and so I tried to load a basic program onto the board using stmcubeMX and selecting the  STM32H757XIH6 microcontroller.   I selected the PA4 pin on the .ioc file and generated the code.  However, when trying to run the program I get this error,

I am using STM32H7R7L8H with MX25L12833F external memory. I created a project with has bootloader, application and external memory loader.Before starting this project I opened another to test if I can read/write/erase MX25L12833F. By using XSPI in Quad mode I could do all the operations.   Below I shared the configuration: XSPI1:

Hi everyone,I am working on a custom PCB designed , but I’ve run into a hardware design constraint and would appreciate some architectural advice on the best way forward.The Setup:Main MCU: STM32L476 (Programming via STM32CubeIDE / HAL)Coprocessor/WiFi: ESP32-WROOM (Intended to handle AWS IoT connections)The Constraint: The PCB designer connected the STM32 and ESP32 exclusively via an I2C bus. There are no physical UART traces connecting the two chips.The Original Goal: The initial plan was to use the STM32 to write firmware directly to the ESP32 over UART, or to use a UART software bridge, and then use UART for passing sensor data to the ESP32 for AWS publishing.The Dilemma: Because the ESP32 ROM bootloader requires UART0 (TX0/RX0) for flashing, I realize a software bridge from the

Hello,I am planning to use STM32H562RGT6 in my product to communicate and update my firmware via CAN FD.To plan that, I am using STM32CubeMX 6.17.0, the datasheet and the AN2606 (Rev 70).And I would like to use only one CAN FD to communicate and to update my firmware in this MCU. But it is impossible to do this in STM32CubeMX. I have only access to FDCAN1. And there are no FDCAN2 on the pins.

I have followed the datasheets and tried to calculate my reference voltage. I am supplying steady 3V on Vref+ pin but I wanted to confirm this because I have some troubles with the ADC precision.So I read the internal voltage both on my card and on a nucelo-C092rc. This

Hello,   While using the Nucleo-F446ZE, I observed that pin PA1 remains at approximately 2.6 V during reset, even when an external pull-down resistor is applied. On this development board, PA1 can be configured as the RMII Reference Clock. However, I have removed SB13, so this function should be disconnected and no longer influence the pin. Given that no internal or external circuitry should be driving this pin and considering that an external pull-down resistor is present I would expect PA1 to be held at 0 V during reset.   Why the pin is not pulled low in this condition?