STM32 MCUs Embedded software

Hi there,I am trying to add the STM32WL3xx chips to embassy-rs and for that I need to be able to generate the peripheral data. They use the SVD files for that information.I was able to find the SVD files for the STM32WL30, WL31 and WL33, but the ones I found seem to be lacking almost all `enumeratedValue` that are present in the other SVD files I could find of other chips. Instead it seems to be described in the description fields but that it way harder to parse.Are there SVD's available anywhere with the data in a way that is it more parse-able?Kind regards 

I have an other issue at the moment. I cant use the GPIOD, VSSI02 is on 3.3V. Im using stm32g0b1kb. It wont toggle it wont read, it does nothing. I have created a small application far away from my main app just to test the GPIO functions.Hi, I a already Figured it out. But Thank you for the response. I have an other issue at the moment. I cant use the GPIOD, VSSI02 is on 3.3V. Im using stm32g0b1kb. It wont toggle it wont read, it does nothing. What am I missing.I cant toggle, read or write them? PB9 PB6, and PD1 to PD3/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2025 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can b

Hello!I am facing a problem when trying to connect to a remote server using NetXDuo and MQTT. We have a cloud service with which we want to establish a connection so we can send some data. I am basing my project on the example from the STMH573 MQTT Client. The exact problem I am facing is that when trying to establish the connection using the username and password, and the certificates an error occurs, when trying to secure connect. I get these two TSL alerts - alert level is 0x2 and alert value 0x28 (secure connection failed to be established). Using TLSv1.2.What I did:Converting CA certificate to the header file format openssl x509 -in ca.crt -outform DER -out ca.der # Then convert into the header file format using xxd.exe xxd.exe -i ca.der > ca.cert.h​Converting client certificate to the header file format open

On an existing, working project developed with stm32cubeide 1.19.0 and the stm32h743zit developed with azrtosh7 3.3.0 that uses usbhs as the host for msc and midi devices, I need to add usbfs channel management to connect hid and midi, but I'm having significant problems configuring the system with stm32cubemx. I haven't found any examples online that support both USB channels. Has anyone tried using both USB channels and can give me some advice? During testing, I found that creating code from stm32cubemx 6.15.0 with both USB channels has many problems. I had to make some manual changes to the code created because it starts running, but only partially works.

Hi everyone, I’m debugging an SMBus issue between an STM32H7, an LTC4100 Smart Charger, and an RRC2054 Smart Battery. I’m trying to write to the ChargingVoltage() register (command 0x15), but the SMBus frames captured on the logic analyzer appear corrupted and often contain NACKs or unexpected STOP/START conditions. My write function is:   static HAL_StatusTypeDef SMBUS_WriteWord(PSMBUSDESC pSMBUSDesc, uint8_t addr, uint8_t cmd, uint16_t value) { HAL_StatusTypeDef status; uint8_t buf[3]; buf[0] = cmd; buf[1] = value & 0xFF; // LSB buf[2] = (value >> ‌‌ & 0xFF; // MSB status = HAL_SMBUS_Master_Transmit_IT( pSMBUSDesc->SMBUSinst, addr << 1, buf, sizeof(buf), SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ); while (HAL_SMBUS_GetState(pSMBUSDesc->SMBUSinst) != HAL_SMBUS_STATE_READY); return status; }

Hello, I’m working with an STM32H723 MCU and have a question about Flash behavior when caches are enabled.Both D-Cache and I-Cache are enabled, and I’m not using any additional MPU configuration. I'm using D-Cache invalidate after a Flash erase operation.Do I also need to invalidate the D-Cache after a Flash write? Below is my current code. The D-Cache invalidate is commented out.everything works fine, but I want to prevent any potential issues in the future. static int32_t flash_write_words(uint32_t addr, uint32_t *data) { volatile uint32_t *flash = (uint32_t *)addr; const uint32_t num_words = FLASH_NB_32BITWORD_IN_FLASHWORD; // check erased for (uint32_t i = 0; i < num_words; i++) { if (flash[i] != 0xFFFFFFFFU) { return -1; } } // write words if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, addr, (uint32_t)data) != HAL_

Hello!I try to use dual bank option on the stm32l476 (256kB) for implementing a custom bootloader. I want just read new program (bin) by custom protocol and write it to another bank. After that I want to switch the banks, reset mcu and start the new program (from another bank). Sounds easy!My actions:I built the program for bank1, load it to the address 0x08000000.Then I loaded the same program to the bank 2 by address 0x08020000. (either with the st-link utility or just by writing to the flash directly from my program, tried both of variants).After that I set option byte bfb2 from 0 to 1 (also either with st-link or just from program). But my mcu does not work at all.I`ve compared the program in both banks and original .bin file with the help of the st-link utility and found that there is no difference between it (no corruption during program).I`ve even tried to build program for bank

Hello everyone,   I am trying to get an IP for my controller using the DHCP i can able to detect the Link up and link down but i can't able to get the IP. I had refered the example code for the ethernet(lwip https server netconn rtos) But i can't able to integrate with my main code can someone please help to either identify the issue or help me to integrate the example code with the main file.                     Thank you.Output Of my code  LWIP Stack InitializedDHCP Started...DHCP Task StartedLink Task StartedDHCP State Changed: 255 -> 6DHCP State: UNKNOWN (6)Ethernet Cable: CONNECTED DHCP Restarted

generally i use cubemx choose cubeF1,but the  hal driver in github is ahead of official website,for example lateset version of cubef1 is 1.8.6.however hal driver has updated later for bug fix. so if i want to use the newest hal driver,i need download form github,and replace it in local repository. it is ok?

  Hi everyone, I am working on an STM32G4 project using the HRTIM1 peripheral. My goal is to generate a burst of exactly 3 PWM pulses on Timer A and Timer B simultaneously, triggered by an External Event (Sync Input / EEV). The Goal: System waits for an external trigger (e.g., from TIM3 via TRGO or physical pin). Upon trigger, HRTIM Timer A and Timer B start. They output exactly 3 PWM cycles. They stop and wait for the next trigger (Single-Shot Retriggerable). The Configuration: I am using STM32CubeIDE and HAL, but I also tried direct register access. Master Timer: Acts as a dummy/pass-through for synchronization. Timer A & B: Mode: Single-Shot Retriggerable. Prescaler: Div1. Period: 1000 ticks. R

Hi STM32 community, I have ordered those the Evalboards: NUCLEO-G0B1RE X-NUCLEO-SNK1M1 - USB Type-C Power Delivery Sink  I have followed all of your existing applications, but none of the had lead to an similar result as displayed by your application descriptions. Lets stick to the newest one:(24) How to build an USBPD Sink application using the X-Cube-TCPP software pack - YouTubeI followed every step accurately several times now, but the result is always the same, Contract -> DEFAULT 5V no current. What am I doing wrong? I have studied all of your AN, watched all Videos, read and did the Wiki but never got any positive result as described..... Im frustrated and hoping for your hel

GOAL To use Ethernet + LwIP on the STM32H743 chip without cache. Explanation We don't want to use the cache when using Ethernet because when the cache is enabled and data is sent and received via DMA on the SPI line, the correct data doesn't propagate to the bus due to a cache miss. Disabling the cache resolves this issue, which is why we prefer not to use the cache when using Ethernet. Cube Versions: STMCubeIDE v1.18.1  STMCubeMX v6.14.1 STMCubeFW_H7 v1.12.0 We used the settings in the following link to configure the project by @Adam BERLINGER 's project: https://community.st.com/t5/stm32

I am working on a simple mp3 player project and have spent a few days on the Spirit library, as offered by ST.This comes in a binary (.a) form only lib_mp3decoder_cortex_m4_v2.2.0.a and has apparently been built for soft floats, using some weird mode where they drive the FPU directly - the "VFP reggister arguments" thing. My project uses the FPU for a lot of stuff, and since you apparently cannot mix these floating modes at link time, I get these errorsSearching online finds a 2021 reply from ST on same topic, where ST say the Spirit company no longer exists so they can't help. But the website is still there, so I emailed them. I got a reply, surprisingly:They don't support users, so I need to contact ST, to which I replied that I am not a car manufacturer, and I am happy to give them some money for a cortex-m4 lib which is actually usable :)Lots of

I’m working on a project with the Nucleo-L476RG. I want to perform a measurement, then put the microcontroller into Sleep Mode for 2 seconds, after which it should be woken up by the RTC clock.I followed the tutorial:How to configure the RTC to wake up the STM32 from Low Power modesUnfortunately, Sleep Mode is entered but not exited properly.Down below are my project settings:

I am trying to setup FreeRTOS for the new STM32N6 Nucleo board. Running into the following error `GCC/ARM_CM55_NTZ/non_secure/port.c:1814: undefined reference to `__privileged_sram_start__'`.Based on https://github.com/STMicroelectronics/x-cube-freertos/blob/main/Projects/NUCLEO-N657X0-Q/Applications/FreeRTOS_MPU/README.md#notes, it looks like I am missing some linker files. The example itself has it defined at https://github.com/STMicroelectronics/x-cube-freertos/blob/main/Projects/NUCLEO-N657X0-Q/Applications/FreeRTOS_MPU/EWARM/stm32n657xx_ax

Hi All,I'm using STM32G4 with TIM1 for motor control. The BKIN hardware protection works correctly - when I pull the BKIN pin (PB10) low, the motor stops, and when high, it runs again with AOE enabled. However, the break interrupt never fires and HAL_TIMEx_BreakCallback is never called. I've verified that TIM1_BRK_TIM15_IRQHandler exists in stm32g4xx_it.c, NVIC is enabled. The break flag never gets set even though BKIN is functioning. What could prevent the break flag from being set while the hardware break feature still works?I want to print diagnostic using BKIN callback routing but it doesn't work.I've attached IOC timer configurations.Best regards

Using Nucleo-U545RE-Q, SPI2 Full-duplex Master, default GPIO selected by STM32CubeMX v6.15.0 with LL selected for implementation.Config clock for max 160 MHz and prescale SPI by 8 for 20 Mbps. Add GPDMA Ch2/3 for SPI2 TX/RX.I double checked the output configuration code generated by the CubeMX against the Cube_FW_H5_V1.5.0 Examples_LL: SPI_TwoBoards_FullDuplex_DMA_Master_Init, and it matches exactly but for peripheral selection. Jumper-wire PC1-to-PC2 (CN7.36-to-CN7.35) for simple SPI loop-back test. With this configuration, the loop-back works when I implemented the SPI full-duplex transfer by LL blocking code. But trying to use the GPDMA channels results in no data, no DMA IRQ for TC or DTE, no SPI IRQ for anything. Below is the simple code to try to get a transfer going, there is initialization code that enables all SPI and DMA interrupt sources and handles the IRQ by clearing the flag and setting the local global booleans that you see belo

I believe there's a bug in the stm32h7rsxx_hal_dma code for dealing with repeated blocks in interrupt mode. This bug probably exists in other STM32H7 devices as well.With a typical repeating transfer, in *NON* interrupt mode, the DMA transfer completes successfully, and the DMA state ends up in HAL_DMA_STATE_READY, ready for another request. All is well.However, in interrupt mode, the DMA transfer completes successfully (all data is correctly transferred), but querying the DMA state in the DMA Transfer Complete callback, you'll get HAL_DMA_STATE_BUSY. In fact, it will remain in this state forever.Looking at the stm32h7rsxx_hal_dma.c code, the block starting at 1154 ("Transfer Complete Interrupt management"). There are really only two cases where the HAL_DMA_STATE_READY can be set:1) LinkedList mode (not relevant to us)2) "Normal transfer" where CBR1 == 0. (i.e. not a repeating block transfer) In a repeating transfer, CBR1 contains the repeating confi

Hello,I am new to STM32F746-Disco and I was trying to develop an application starting from TouchGFX.It went all good in developing a touchGFX app and use the generated .ioc and so on to configure a project but I've tried afterwards to configure the ethernet stack LWIP and so on but I was never able to communicate and ping the ethernet device.I've tried on my local to run the ethernet example and I was able to properly ping the device but never been able to do it in the project configured with touchGFX.The strange thing is that I can partially see some comunication such as ARP messages and so on but then the ethernet stack is not capable to reply to ping message. here a snapshot of the communication between my PC and the st board.

I'm re-using a sequential I2C library that worked on a couple other ST devices with different I2C devices, but it doesn't work on a STM32F030.They are functions for I2C register operations, where we always start with a write with the register address and then a write/read, depending on the operation: // Read register HAL_I2C_Master_Seq_Transmit_IT(peripheral, address, &registerAddress,1, I2C_OTHER_FRAME); HAL_I2C_Master_Seq_Receive_IT(peripheral, address, data,size, I2C_OTHER_AND_LAST_FRAME); // Write register HAL_I2C_Master_Seq_Transmit_IT(peripheral, address, &registerAddress,1, I2C_OTHER_FRAME); HAL_I2C_Master_Seq_Transmit_IT(peripheral, address, data,size, I2C_OTHER_AND_LAST_FRAME);The write doesn't work (read works fine). The first call to HAL_I2C_Master_Seq_Transmit_IT is successful, but not the second.

Hello,I am working on a custom board based on the STM32H747 to develop a Touchgfx application as User Interface, where I am using the same QSPI Flash device as the STM32H747I-EVAL kit (MT25TL01G 1Gbit), but with a different chip-select pin wiring.On the STM32H747I-EVAL board, the external loader (MT25TL01G_STM32H747I-EVAL.stldr) is configured to use:QSPI_BK1_NCS (PG6) as the common chip-select for both banks.On my custom board, the MT25TL01G device is wired as:QSPI_BK2_NCS (PC11) as the common chip-select for both banks.I updated my firmware, CubeMX configuration, pin assignments, and the QSPI initialization, and QSPI is now working correctly inside my application firmware.However, STM32CubeProgrammer cannot flash the external QSPI because the supplied stldr file still expects the original chip-select pin (P

I think I have found a bug in the mentioned file (in my case the file comes from x-cube_azrtos-h7, but the problem seems to be present in other versions to).In the function fx_stm32_sd_driver() there is a check that the passed Databuffer (media_ptr→fx_media_driver_buffer) is 4 Byte alligned, if this is true then the function sd_read_data() uses directly the passed buffer otherwise it uses a local scratch buffer. But after the DMA the function needs to invalidate the cache (by calling invalidate_cache_by_addr), on the Cortex M7 a cache line is 32 Byte.This may overwrite data in the cache out side of the buffer.Correction:Set use_scratch_buffer to false only when fx_media_driver_buffer is 32 Byte aligned and a multiple of 32 Byte.

Hello,This is a general suggestion that I would like to make. While I think it's great that all HAL libraries are available on GitHub, I would like to suggest creating a github release for the official versions in addition to creating tags. This can be done on GitHub with just a few clicks. The reason for this is the use of component analysis platforms such as Dependency Track, which make it possible to automatically track the libraries used, a task that is becoming increasingly important. Unfortunately, Dependency Track requires a release in order to track the version. While it is also possible to track this using the commit ID, for example, a release would be the better approach here. I welcome feedback and the possible realization of this suggestion.For Example ARM is doing this with their CMSIS Package: https://github.com/ARM-software/CMSIS_5-Hannes

Hello I have a code use CAN on a stm32U585 he work fine if the CAN bus have not disturbance But if i have to many disturbance for exemple if i make a short circuit bethen CANH and CANL when i remove the short circuit the CAN no restart to send data. I need stop and restart CAN   HAL_FDCAN_Stop(&hfdcan1); HAL_FDCAN_Start(&hfdcan1); After the disturbance, the return value of HAL_FDCAN_GetState() and HAL_FDCAN_GetError() remains unchanged.   How can I immediately know when there is a problem with CAN

I am working with the STM32H7S3L8 MCU and using Zephyr RTOS for development. Currently, I see that Zephyr supports USB FS but does not seem to support USB HS for this MCU. Are there plans to add this support in future Zephyr releases? Any guidance or workarounds for enabling USB HS in Zephyr would be greatly appreciated. Thank you!