STM32CubeMX (MCUs)

Hi there,I'm using an N6 with the latest version of IDE and MX with the FSBL/Appli dual project structure as per the FSBL LRUN template, and MX is incorrectly managing code. When using X-CUBE-FREERTOS in Application mode, code generation and cleanup is buggy. I've attached a FreeMarker template error generated WITHIN app_freertos.cWhen removing FreeRTOS from the project, MX fails to remove void MX_FREERTOS_Init(void); and MX_FREERTOS_Init(); from main.c. It also doesn't remove the head app_freertos.h and FreeRTOSConfig.h header files, but does remove the source file. I get the following compiler error:make[1]: *** No rule to make target '/Users/h7/STM32CubeIDE/workspace_1.16.1/N6Project/Appli/Src/app_freertos.c', needed by 'Application/User/app_freertos.o'. Stop.I'm also finding that the files that I have added to the build exclusion list in libraries that I've included in Middlewares/Third_Party are bei

Hello,I have observed this issue in version 6.16.1 across several MCU series (F3, F4, H5, H7), though it appears likely that all earlier versions are affected.The generated .cmake toolchain files incorrectly treat the --specs=nano.specs option as linker-only. This option should be applied globally, as it also affects the system include paths used during compilation. Specifically, it causes the compiler to include arm-none-eabi/include/newlib-nano/newlib.h instead of the standard arm-none-eabi/include/newlib.h.While this mismatch probably does not break ABI compatibility—since the structures provided from the standard headers are larger than those used in the compiled newlib-nano library—it does negate the RAM usage benefits of newlib-nano. This is particularly problematic when using the USE_NEWLIB_REENTRANT FreeRTOS option.Regards,Peter 

The application bundle contains Contents/MacOs instead of the required Contents/MacOS. On case-sensitive file systems, this prevents LaunchServices/Finder from starting the app.The binary runs correctly when launched directly from Terminal.Renaming MacOs → MacOS also seems to solve the issue.Seems to be an error in the ST packaging system.

"I am generating code using STM32CubeMX for the STM32WB09, aiming to implement BLE with CMSIS-OS.I am facing an issue where, even after explicitly disabling the Sequencer when enabling CMSIS-OS, CubeMX still generates code that relies on the Sequencer. This results in an application with multiple errors.Upon checking the official examples at https://github.com/STMicroelectronics/STM32CubeWB0, I noticed that the projects utilizing RTOS do not seem to rely on CubeMX (the .ioc files are missing).Is there a known limitation or bug regarding this behavior in CubeMX?"

Hi,I'm probably doing wrong as a newbie in STM32 programmation:I try to generate this configuration code for dma but I can't see any dma.c file in the project folder.(I did refresh the project after generating the code)Thanks for help 

Hi, I found a small bug in STM32CubeMX for STM32WL55:Enabling the option "MSI Auto Calibration" for section "RCC" does nothing, i.e. generated code doesn't change.I think it should add a call to HAL_RCCEx_EnableMSIPLLMode() or LL_RCC_MSI_EnablePLLMode () in SystemClock_Config() - same as it does for STM32U0. This enables RCC_CR_MSIPLLEN.

Hi there,I found an issue with the CubeMX 6.16.1 during the TouchGFX usage. I generated the files by TouchGFX 4.26 (selected the Stm32h7s7 development board with 24bpp project) and opened the cubemx to generate the code (I've been using vscode so I changed only the toolchain/IDE to Cmake and and with these settings the project was flashed and worked everything correctly.However, when I wanted to use the generate perpheral initialization as par of 'c/h' files and screen was struggled and couldn't read it's content. Nothing else was changed. In the visual studio I cleaned and rebuild the project but it did not work at all.Would it be possible to solve this?Thank you in advance!

The erroneous configuration in the tx_initialize_low_level.S is this: LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgMThe tx_initialize_low_level.S file is generated upon selecting ThreadX 'Core' in the STM32CubeMX v6.15.0, and the above line is thereafter never changed. Specifically, upon enabling 'Enable BASEPRI support' and selecting a very common value of 5 for the TX_BASEPRI_VALUE, the above line is not updated accordingly. Not syncing the SYSTICK IRQ priority with the TX_BASE_PRI_VALUE of course leads to a system failure.This issue can be duplicated by creating a brand new project with STM32CubeMX v6.15.0 and it can be seen in the sample projects included in the Applications/ThreadX in the STM32Cube_FW_U5_V1.8.0

Hi all, I am trying to get a zephyr project running on an STM32N6570-DK, including Camera, NPU, VENC and Ethernet.I have been using STMCubeMX 6.16.1 to create the project based on the provided DK default settings.For the Ethernet block, the configurator shows pin conflicts, I double-checked and the pins are not in use by the Ethernet driver:There are similar warnings for the SD/MMC2 block:

CubeMX 6.16.0 "Memory Management" used for ethernet and with enabled linker file generation creates the following [ORIGIN adapted from default]:RxDescripSection (rwx) : ORIGIN = 0x30040000, LENGTH = 0K TxDescripSection (rwx) : ORIGIN = 0x30040060, LENGTH = 0K Rx_PoolSection (rwx) : ORIGIN = 0x30040200, LENGTH = 1KWhat I would have expected was:RxDescripSection (rwx) : ORIGIN = 0x30040000, LENGTH = 96 TxDescripSection (rwx) : ORIGIN = 0x30040060, LENGTH = 96 Rx_PoolSection (rwx) : ORIGIN = 0x30040200, LENGTH = 1536[with just 1 ETH RX buffer - see this other post ].Can someone explain to me whether this is intentional - maybe because of a constriction with the MPU granularity?O

Using latest STM32CubeMX version 6.16.1 on STM32N6570-DK. It is possible to assign peripherals like UART, I2C, etc. into multiple contexts - boot, app, memloader, but I cannot find a way to assign plain simple GPIO's into multiple contexts. CubeMX only allows to pick Free (which means none) or one of them. Needless to say, I would like to use same LEDs and buttons from multiple contexts. I don't think the RIF is the cause, not using it right now. Seems like a missing feature.

Hello!I wanted to set up some settings from CubeMX, specifically NX_IP_PERIODIC_RATE in NetXDuo and Rx Descriptor Length in ETH section. NX_IP_PERIODIC_RATE default value is set to 100, but when I set it to 1000, the value does not change when re-generating the code.Rx Descriptor Length default value is set to 4, but when I set it to 8/16/32, the value does not change when re-generating the code. Right now, whenever I re-generate the code, I just manually change these settings in my code due to these settings being set to their default ones. The same problem occurred in CubeMX version 6.15. One thing to point out also, is that the settings I changed are not set back to their default ones in CubeMX, only in the generated code. Also, no errors or warnings are displayed.Is this a bug or am I supposed to do something else before being able to change and apply these settings?

Despite enabling ADC, the ADC clock option is greyed out for MCU STM32G0B1KBUx. I'm using version 6.16.1

Howdy!I'm encountering a peculiar issue using STM32CubeMX ( version 16.6.1 ) and configuring the I2C1 peripheral with firmware version STM32Cube FW_G4 V1.6.1.In short, I'm trying to configure it for SMBus-two-wire-Interface, but this option fails to appear in the drop-down, only making SMBus-Alert-Mode available. This is a problem since the alert pin is already being utilized for a different purpose.This appears to be true for all the I2Cx on this device, and in desperation, I checked a handful

Hello,Due to limitations with the STM32WBA's silicon & Bluetooth stack we've had to significantly re-engineer our hardware and add an external Bluetooth chip. As part of this, we updated our SAI blocks so that one block is transmit and one is receive, and moved our PDM microphones to a SPI bus.Since we have two PDM microphones, we've followed AN5027 "Interfacing PDM Digital Microphones":In our setup, we have SPI2 SCK (mapped to PB10) connected to PA1, and connected PA9 to the DMIC_CLK line. Our plan has been to map PA1 (input) -> TIM17_CH1, which then triggers (via ITR8) TIM3_CH2 which is

Hello,I searched on Google but I don't know if anyone has encountered this problem before. As we know, CubeMx and Cube IDE were recently released as two separate programs. I think this error might be related to that.The error is this: I open a project I created in CubeMx in the IDE and upload it to the chip; there's no problem up to this point. However, whenever I make an update in CubeMx, the entire update isn't reflected in the IDE (or rather, in main.c). If there were no updates at all, I would look for the problem elsewhere, but some of the configuration settings are transferred to the IDE while others are not. The most recent example I experienced was that changes to the ARR and Prescaler registers of the TIMER module were transferred to the IDE, but the changes to the PWM (CCR1) register remained the same. In this case, I had to manually change the relevant value in main.c (and it was quite difficult to notice).Look, the main problem here is that we develo

When I used the MMT tool in STM32CubeMX to configure a 256MB NAND FLASH based on FMC, an error appeared. I am using the STM32H743IIT6 chip and have configured NAND FLASH in the FMC. I want to know how to solve this problem. 

Yes I should have taken a backup - but modern software must always have build-in backup solution so you do not corrupt your own files. Ask chatgpt if you need the code. I used 2 days to make this project, luckily I have the main.c so I can copy names from this.  I am on Linux Mint version 22.2 with STM32CubeMX version 6.16.1 and Visual Studio Code Version: 1.107.1.The fault was in STM32CubeMX, that did not save correctly. During my work I experienced the software closing without saying a word on the error, especially in the ADC1 setup. But every time I could just start it again, but not this time:-(Attached you find the surviving part of the IOC file.Thank you for listening to my disaster. Best regards   

 We are using the STM32N657Z0H3Q (142-pin TFBGA package).CSI behavior in STM32CubeMX is inconsistent across versions:In older CubeMX versions(1.64), CSI lanes (CSI_D0P/N, CSI_D1P/N, CSI_CKP/CKN, CSI_REXT, etc.) are displayed in the Pinout view, but these signals are not actually assignable to physical pins. They appear as virtual pins only.In newer CubeMX versions(1.65), CSI is still listed in the peripheral view, but no CSI lane pins are shown at all. In case, the generated .ioc file contains only virtual signals:VP_CSI_VS_CSI.Mode=CSI VP_CSI_VS_CSI.Signal=CSI_VS_CSI VP_DCMIPP_CSI.Mode=SerialInterface VP_DCMIPP_CSI.Signal=DCMIPP_CSIOn hardware, when connecting a CSI-2 camera, the following is observed:DCMIPP and CSI registers initialize correctly,no LP-to-HS trans

Hello ST Community,I am writing to report a serious regression in STM32CubeMX 6.16.0 running on Arch Linux (KDE Plasma) with a 1920x1080 resolution.Environment:OS: Arch Linux (Rolling)Java: OpenJDK 25Desktop: KDE Plasma (Wayland/X11)Screen Resolution: 1920x1080The Regression (Comparison):1. STM32CubeMX 6.15.0 (Previous Version):Status: Works perfectly out-of-the-box.Details: I did not need to modify any configuration files or set any environment variables. The application launched correctly, the UI was usable, and the window could be resized and maximized without issues.2. STM32CubeMX 6.16.0 (Current Version):

The STM32H7RS series includes a USB HS PHY with a special PLL that generates the 480MHz clock required as well as a 60MHz clock for the OTG HS peripheral and optionally a 48MHz clock for the separate OTG FS peripheral. The PLL for the USB PHY has several configuration bitfields in the RCC->CCIPR1 register that are used to set the source of the PLL reference clock, as well as its frequency: Bits 13:12 USBPHYCSEL[1:0]: USBPHYC kernel clock source selection. Set and reset by software.00: hse_ker_ck (default after reset)01: hse_ker_ck / 210: pll3_q_ck11: reserved, the kernel clock is disabledBits 11:8 USBREFCKSEL[3:0]: USBPHYC kernel clock frequency selection .Set and reset by software.This field is used to indicate to the USBPHYC, the frequency of the reference kernel clock providedto the USBPHYC.0011: The kernel clock frequency provided to the USBPHYC is 16 MHz1000: The kernel clock frequency provided t

Greetings everyone,Using the C programming language, I'm creating the encryption algorithm AES-256 code for a trusted execution environment and checking to see if the hardware supports it.AES/CRYP enabling is giving me trouble. I can't find it under Connectivity or Security, and I can't enable it with STM32CubeMX.I'm getting this error, so please assist. 

We are using STM MCU MPN : STM32U375VGT6Q for one of our new projects, we are currently using HSE External 16 MHz crystal for system clock.We are trying to configure the STM32U375 MCU to run at 96 MHz using an HSE external 16 MHz crystal. In STM32CubeMX, we are unable to find the PLL option sourced from HSE in the clock tree on the Clock Configuration page.Could you please advise us on below points:Use HSE (16 MHz) as the PLL sourceSet the PLL multipliers/dividers to achieve SYSCLK = 96 MHz

It seems like CubeMX sets this default value hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE; when doing software NSS and SPI Mode 3 like: hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; hspi1.Init.NSS = SPI_NSS_SOFT; This results in a non working SPI at least on STM32H652 (did not check the signals with Oscilloscope, but I assume the CLK and/or MOSI float back to an undefined value after the first transaction, breaking the next one). This can be fixed by doing:hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE; Wouldn't it be recommended CubeMX defaults the IO_STATE_ENABLE in this case? This one Bit just cost me 5 Hours of headache :\

Why can’t my cubemx configure L1 cache? How to enable it?Also, the MPU cannot be configured. You can only use the default configuration and modify it in the generate code.I also configured Memory management, but did not see the enable Cache and MPU synchronization settingsCubeMx 6.16.1 on macos MAC 26.1MCU:STM32H743IIT6