Product forums

Hello, as in the title I'm facing issues with high intensity BLE transfers (~4 writes and 4 reads and indicates per second) on X-NUCLEO-ST67W71 paired with STM32N6570-DK.Randomly during the transfer I'm encountering this error which simply breakes the communication with ST67:ST67 Log: [ERROR] [1055938] [spi_xfer_engine] (spi_iface.c:448) waiting for spi txn ready timeouted ST67 Log: [ERROR] [1057938] [spi_xfer_engine] (spi_iface.c:448) waiting for spi txn ready timeouted ST67 Log: Timeout waiting for tx ST67 Log: [WARN] [1058941] [ST67Task] (st67_app.c:1138) Set read data error! ST67 Log: [ERROR] [1059938] [spi_xfer_engine] (spi_iface.c:448) waiting for spi txn ready timeouted ST67 Log: [ERROR] [1061938] [spi_xfer_engine] (spi_iface.c:448) waiting for spi txn ready timeouted ST67 Log: [ERROR] [1063938] [spi_xfer_engine] (spi_iface.c:448) waiting for spi txn ready timeouted ST67 Log: Timeout waiting for tx ST67 Log:

Hi Team,   I am facing to connect with SR5E1-EVBE7000P board. I give below the issue. Can anyone help me to resolve this issue   Error in final launch sequence:   Failed to execute MI command: -exec-run Error message from debugger back end: Don't know how to run. Try "help target". Failed to execute MI command: -exec-run Error message from debugger back end: Don't know how to run. Try "help target". Don't know how to run. Try "help target".

Hi!I having some issues with Linux at startup. It seems that it disabling the Bucks/LDOs at startup.vddio2: disabling vddio3: disabling vddio4: disabling vddcore: disabling v1v8: disabling v3v3: disablingWhy does this occur?Here is the complete output as attached file. As you can see, I have set up my own outputs for error handling. The device three can be found here:https://github.com/DanielMartensson/Watermelon-Wine-1A/tree/linux-testing/watermelon-wine-os%2Fcubemx%2FCA35%2FDeviceTree%2FfirmwareGood to know:clk_get_index = 143 is USART6.I have activated the RNG for TF-A only. It seems not to wake up. It's the same default configuration as DK.

In STM32CubeMX, here is the orientation for a chip with a red dot marking pin 1 at the top left when text reads from left to right.In real life, here is the orientation for a chip with a red dot marking pin 1. As far as I'm aware, all STM32 chips are oriented like this, with pin 1 at the bottom left when text reads from left to right.

Hello,I know there are already other threads on this topic, but none of the replies have convinced me.Perhaps someone can help me.My real problem is with the pedometer in the LSM6DSO.I am setting the following values in the registers:ODR = 52 HzLOW_POWER_MODEPEDO_CMD_REG -----> FP_REJECTION_EN = 1EMB_FUNC_EN_A -----> PEDO_EN = 1EMB_FUNC_EN_B -----> PEDO_ADV_EN = 1PEDO_DEB_STEPS_CONF = 0x0A (default value)PEDO_SC_DELTAT_H = 0 (default value)PEDO_SC_DELTAT_L = 0 (default value)I am not using the interrupt for the pedometer, I am polling the value in the register STEP_COUNTER_H | STEP_COUNTER_LSetting AD_DET_EN = 1 in PEDO_CMD_REG didn't make any difference for me.I have 2 question about the pedometer:1 - Do I need to configure anything else to improve the performance of the pedomter ? Is possible to improve it ?2 - What is the STEP_DET_INIT bit in the EMB_

I have a suggestion for the STM32CubeMonitor-Power application.For the ultra low power applications it would be great if the Y-axis could be logarithmically scaled, so that the area around 0.5-100 µA is more detailed (sleep mode) compared to the active mode (1-2 mA). As it is now I cannot quantify the current usage with a glance when the device is sleeping.I would very much like this to be added.Greetings,Rico

Hello,I am using X-CUBE-EEPROM as a mean to store variable in internal FLASH memory on STM32U5G9-DK2 board. Here is my function where a variable in flash:static FLASH_STATUS flash_slot_write_shared_key(const FLASH_INDEX *index, uint8_t slot, uint8_t *shared_key) { if (slot > FLASH_SLOTS_NUMBER) return FLASH_WRONG_PARAM; if (shared_key == NULL) return FLASH_NULL_PARAM; EE_Status ee_status = EE_WRITE_ERROR; HAL_FLASH_Unlock(); taskENTER_CRITICAL(); ee_status = EE_WriteVariable96bits((uint16_t)index->entries[slot].addr, (uint64_t *)(shared_key)); if (ee_status != EE_OK) return FLASH_ERROR; ee_status = EE_WriteVariable96bits((uint16_t)index->entries[slot].addr + 1, (uint64_t *)(shared_key + 12)); if (ee_status != EE_OK) return FLASH_ERROR; ee_status = EE_WriteVariable32bits((uint16_t)index->entries[slot].addr + 2, *(uint32_t *)(shared_key + 24)); if (ee_status != EE_OK) return FLASH__ERROR; ee_

The STM32MP135 is powered by PMIC1A. After initial power-up, the voltage at BUCK4 is normal at 3.3V, but during U-Boot flashing, the output voltage at VOUT4 drops to only 2.4V, causing the flashing to fail. The VDD and VDDQ pins of the eMMC are powered by the same power rail, VOUT4.

I am trying to understand one point in the official VL53L8CX datasheet.In the pin description table, pin C5 (MISO) is described for SPI as:“SPI: Main input secondary output. Push-pull output, driven to IOVDD level.”But in Figure 6 (“Typical application schematic for SPI”), the MISO line seems to have a 47 kΩ pull-down resistor to GND.I attached two screenshots:1. the table entry for C5 / MISO2. the SPI typical schematic with the suspected 47 kΩ pull-down highlightedMy question is: how should this be interpretedcorrectl

Hello,I think I have interesting case, but from the beginningI use STM32F446ZEJx and HAL Drivers from STM32Cube_FW_F4_V1.28.3.When I use HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)with Size=5 it internally checks the argumentif ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) return HAL_ERROR;and passes the Size to/* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; hspi->pTxBuffPtr = (const uint8_t *)pTxData; hspi->TxXferSize = Size; hspi->TxXferCount = Size; hspi->pRxBuffPtr = (uint8_t *)pRxData; hspi->RxXferSize = Size; hspi->RxXferCount = Size;later it configures the DMA channels,Rx

Is there a guide that shows how to set up a CDC USB device on the STM32N6 without using ThreadX in baremetal mode?   I've tried following both, but it seems to hardfault on both examples crash at __lib_init_array(). I've tried increasing the stack and heap sizes to no success:https://community.st.com/t5/stm32-mcus/how-to-use-stmicroelectronics-classic-usb-device-middleware-with/ta-p/599274    https://community.st.com/t5/stm32-mcus/how-to-implement-usbx-in-standalone-mode/ta-p/614435    It's frustrating that the old USB_Device middleware got removed. We s

Hello,I am using STM32H7B3LIH6Q and planning to interface a TFT display via LTDC (RGB interface). I am considering the following options:NHD-4.3-800480CF-ASXP (4.3", 800×480, RGB)NHD-4.3-480272EF-ASXP (4.3", 480×272, RGB)NHD-3.5-320240JF-ASXP (3.5", 320×240, RGB)Kindly suggest:Which TFT is most suitable for STM32H7 in terms of performance and ease of integration?Is 800×480 the preferred resolution for LTDC + TouchGFX applications?Do these RGB TFT displays support HDMI interface directly?If HDMI output is required, is using an external RGB-to-HDMI bridge (e.g., ADV7511) the correct approach?Thanks.

Hi all! Thank you for taking time to assist me. I am attempting to make a composite USB Device on the NUCLEO-C562RE. I found the Middleware USBX examples and the core drivers exist in my toolchain at: STM32CubeC5/middleware/usbx However, I cannot seem to find the middleware configuration for USBX in STM32CubeMX2. My pack manager in the STM32CubeMX2 is set to this default value: "cube.packManager.cmsisPackRepositories": ["https://developer.st.com/st-pack-server/api/v1/pidx/STMicroelectronics.pidx"] Please let me know if I have missed anything or if you need further information from me to figure out the root issue. The examples, linked above, clearly auto generated the USBX files

Discrepancy between AN5967 and MB1940 schematic regarding VDDA18PMU / VDDSMPS connections in external SMPS mode Hello ST Team,We have a custom board based on the STM32N657X0H3Q, designed using the MB1940 (Nucleo-N657X0Q) schematic as reference. The board has been fabricated and assembled, and we are currently in the bring-up phase.During bring-up we encountered a failure on the external SMPS path (TPS62088YFP) used for VDDCORE generation. The external buck failed with a shorted high-side FET, driving 5V directly onto the VDDCORE rail. After investigation, we recovered the board by removing the failed external buck and switching to the on-chip internal SMPS, which is currently working correctly and supplying VDDCORE at 0.810 V.While reviewing the power supply architecture during this debug, we noticed a discrepancy between AN5967 (Getting started with hardware development fo

Hi,I'm trying to setup HSO on the G431, I used the B-G431B-ESC1 board as a starting guide. I'm trying to use differential sensing with internal OP-AMPs and internal PGA. I have split the currents and phase voltages across ADC1 and ADC2 but I still cannot get the HSO option to show up with MC workbench. I'm using the latest version. I have attached my board JSON file, any guidance will be appreciated.Thanks,Ray

I am currently working on the STM32N6570-DK board and need guidance on FSBL configuration, multi-layer project structure, and external flash programming.Issue 1: FSBL Peripheral ConfigurationI enabled multiple peripherals in FSBL:USART1, I2CBSPXSPI1, XSPI2CSI, DCMIPPVENC, JPEGAfter enabling these, I am getting an "unsupported relocation" error.Kindly guide:Which peripherals are recommended to enable in FSBLWhich peripherals should be initialized in the Application layer insteadProper distribution of initialization between:FSBLApplicationExternal Memory LoaderIssue 2: Multi-Layer Project UnderstandingCurrently, the project has:Three separate layers (FSBL, Application, External Loader)Each has its own startup file and main function

ProblemInstalled version 1.17 of the stmcube ide. Need the .ioc code generation feature to work. The most convenient way to do this is to login so the ide can download firmware. I have tried to login. Login failed multiple timesTried1. Turn off firewall2. Run STMCube IDE as adminstrator3. Run installer as administrator4. Use mobile hotspot5. Installing newer and older versions of STM6. Installing the program on a different PCNone of the above options worked  

I am currently evaluating thefor use with 1000Base-T Ethernet and am attempting to configure the peripherals using STM32CubeMX. While following the same process as with other STM32 chips, I was unable to find the Ethernet configuration under Pinout & Configuration -> Connectivity. Could you kindly advise where I should configure the Ethernet settings?Thank you for your assistance.

Hi,We are currently developing a solution based on the STM32WBA65RIV6 MCU, and we would like the internal RTC to remain active while the MCU is powered down.We assume that this is possible, and we would like to clarify the following points:For how long does the RTC retain its values after the MCU is powered down (by default)?Is it possible to connect a backup capacitor or battery to supply only the RTC or part of the MCU in order to extend the retention time?We also want to know if there is any documentation available on this topic. We have not been able to find detailed information.Thank you in advance.Best regards,Luis

Hi to everybody,I have a annoying problem with Teseo-liv3f (on Astra1B). It can not find any sattelites. What I have:1. Chip is build in dev kit from STM Astra1B, so there is no problem with layout, wrong antenna, etc. 2. I'm using as reference hex files from example project provided by STM: "CustomUC"3. Kit is placed under sky, so it can see sattelites.4. I have 3 pcs. of such kit, both can't see sattlites5. On all devices, I program (at the beginning) my compilation of my firmware. When I realise that it can't see sattelites, I reprogram then flash by hex delivered by STM (CustomUC). Still can't see sattlites (I'm using on console command !gnssreport-on). Maybe during programming my version of firmware, I damaged some configuration bytes??6. I though that maybe amplifier on gps antenna is off (ANToff pin13), but there is 3.3V, so seems to be OK.7. Now, I detach on one device TX and RX of Teseo-liv3F, and I connect them (

I am using STM32CubeIDE for a project using custom hardware with a STM32G0B1CBT6.I recently hit a bug where my code was doing a 32-bit write to an address that wasn't on a 32-bit boundary (off by 2 bytes) and a Hard Fault was generated.I've corrected the code to avoid this, but this same code worked OK on an earlier project - which used Keil uVision and a STM32F103C8T6.I've seen references to compiler options to control this behavior, but I've not found them in CubeIDE or Keil.  Am I wrong here?  Or can someone point me to where those options might be?  Or is this some kind of difference between these two chips?Also: I'm on the fence about whether this is a good feature or not.  On the one hand, avoiding unaligned memory  seems fairly easy.  On the other hand, Hard Faults really cause havoc in my world. 

In STM32CubeIDE, I can compile C++ code in the project. The CMake file generated for the VSCode extension doesn't work with C++. Is there a way to use C++ code with less hassle than trying to get around this by hand?

Hi,I am working with the STM32WB5MMGH6TR and would like to achieve the following:Stream GATT data to a mobile phoneSimultaneously play simple audio to BLE earbudsThe audio requirement is modest: a tone that rises and falls in a sine-wave pattern (no music, no complex audio, no high-quality audio). The frequency should sweep between 500 Hz and 2 kHz, with a modulation rate of up to 60 Hz.Is this feasible using the standard ST BLE stack for the STM32WB5MMGH6TR? The key requirement is that both operations run concurrently.If it is possible, could you please outline the recommended approach?Thank you as always.

Hi all, I am trying to implement simple USB-FS communication on a BlueCoin board (STEVAL-BCNCS01V1). I am following the official STM tutorial on USB CDC and referencing the official SW package for BlueCoin. So, for USB I need PLL source from HSE clock: BlueCoin schematic shows that there is a crystal oscillator @16Mhz (NDK NX2520SA) installed directly on the board, so I configured RCC HSE as Crystal/Ceramic Resonator; the problem is that the function HAL_RCC_OscConfig(&RCC_OscInitStruct) in SystemClock_Config retrieves HAL_TIMEOUT as a result. T