STM32 MCUs

Board / SoCBoard: NUCLEO-WB09KESoC: STM32WB09SoftwareZephyr version: v4.4.0-rc2-41-g149c8b1758a8Toolchain / build system: West + Zephyr standard build flowIssue summaryWhen building a very small Zephyr application for NUCLEO-WB09KE, simply enabling:CONFIG_BT=ycan cause intermittent boot failure.The failure happens very early in boot:no UART outputno boot bannerno application printk()main() appears to never run in failed bootsThis happens even when the application does not call any Bluetooth API.

The STM32G031G8U6 in a UFQFPN28 package does not have PF0 / PF1 pins for HSE OSC_IN / OSC_OUT.  It does however have OSC_IN on PC14.  This is intended for an external CMOS oscillator in bypass mode.I’m currently in the schematic design stage. My board clock is a clipped-sine TCXO used for other purposes.  In some modes, I’d like to use it to clock the STM32. I’m very constrained on cost, power, and board space.  The clipped-sine doesn't meet the voltage level requirements for a bypass-mode clock.Is it possible to configure HSE as if it were a crystal, but instead supply a clipped-sine 0.8 Vpp clock from the TCXO to PC14 OSC_IN? Does the die used in UFQFPN28 even have the HSE oscillator circuit that exists in the 48 pin package?I would set RCC_CR[HSEBYP] = 0 and R

Hi, I need to measure a 4.2V battery while my MCU's supply varies between 2.0V and 3.3V. Since VDDA is the ADC reference, raw ADC counts will drift as the supply changes. Is this the correct method? My plan: Feed the battery voltage through a 10K/7K5 divider into one ADC channel (scaled to stay below VDDA_min = 2.0V). Read VREFINT on a second ADC channel. Use VREFINT (whose true value is known from the factory calibration in system memory) to back-calculate the actual VDDA, then convert the battery channel's raw count into volts. The formula being:V_battery = 3.0 V × (VREFINT_CAL / VREFINT_DATA) × (ADC_battery / 4095) × ((R1 + R2) / R2)   Is this the correct approach for getting a supply-independent battery reading on this part? Anything I'm missing... sampling time for VREFINT, divider impedance vs. ADC sample-and-hold, or calibration register quirks specific to the C0 seri

Hi! I'm trying to design a project that will use an stm32u5, and I would like to add PSRAM to it. Most higher-capacity PSRAMs seem to want to run at 1.8V rather than 3.3V, from what I can tell.  The particular U5 I've tentatively selected (the U595), has a VDDIO2 power pin, which I understand that I can run at 1.8V while running the rest of the MCU at 3.3V. This feature seems specifically designed to address this use case (and Claude and Gemini insist that it's possible with the right u5 variant, though I'm well aware how confidently wrong AI tools can be). The datasheet says that VDDIO2 affects Pin Bank G. However, I can't quite seem to figure out how I might actually connect to a PSRAM chip exclusively with this bank.  I haven't been in these waters before, so it's possible I'm overlooking something straightforward - a lot of the configuration options for PSRAM are new to me. It seems I could use FMC or SPI to connect to the PSRAM chip, but playing a

In the code examples provided with AN4502, this pattern is used often:  while ( STACK_SMBUS_IsReady(pcontext) != SMBUS_SMS_READY) { } But in our code, when built with the Release CMake preset, this hangs forever.My understanding is that this is because the `StateMachine` member of the SMBus context struct (SMBUS_StackHandleTypeDef) is getting updated by the SMBUS interrupt handlers, but it isn't marked volatile:  * @brief Stack state machine handling structure - the stack operation context */ typedef struct { uint32_t StateMachine; /*!< Keeps track of current stack state */ SMBUS_HandleTypeDef *Device; /*!< HAL driver handle */ uint8_t *ARP_UDID; /*!< A UDID used in ARP */ st_command_t *CurrentCommand; /*!< NULL, unless a command is being processed */ st_command_t *CMD_table; /*!< Pointer to first record

Ok, a tricky one.  So for services and attributes it's documented that there is 10752 bytes, each service takes up 48 bytes, each attribute 40 bytes, and if you got th number of services and attributes you can compute backwards  BLE_ATT_VALUE_ARRAY_SIZE (after you mapped all characteristics to actual attributes), given the upper limit. Easy enough. (GATT_DB_Size_SRAM_NVM.xlsx) My problem is now BLE_MBLOCK_COUNT. There is this macro:#define BLE_TOTAL_BUFFER_SIZE(n_link, mblocks_count) \ (16 + BLE_FIXED_BUFFER_SIZE_BYTES + \ (BLE_PER_LINK_SIZE_BYTES * (n_link)) + \ ((BLE_MEM_BLOCK_SIZE + 8) * (mblocks_count)))What is the limit for BLE_TOTAL_BUFFER_SIZE ? If that

Hi, I would like to use MDMA to get values from ADC. I have one adc set with 6 channels, starting conversion with timer (100µs). So I would like to save in memory adc values like that : val1, val2, val3, val4, val5, val6 -> val1(100µs),val1(200µs)...val1(1000µs),val2(100µs),val2(200µs)...val2(1000µs)...val6(1000µs) the destination memory is 60 values of 16 bits. That means I would like to be interrupted every 1ms by MDMA. So I use this configuration (at beginning I would like to test only 2 first values val1 and val2): this is the code to initialize MDMA MDMA_HandleTypeDef hmdma_mdma_channel0_dma1_stream2_tc_0; MDMA_LinkNodeTypeDef node_mdma_channel0_dma1_stream2_tc_1; /** * Enable MDMA controller clock * Configure MDMA for global transfers * hmdma_mdma_channel0_dma1_stream2_tc_0 * node_mdma_channel0_dma1_stream2_tc_1 */ void MX_MDMA_Init(void) { /* MDMA controller clock ena

I'm using an STM32G431 with FreeRTOS. I have a total of 5 tasks, including the default task, and all of them were set to osPriorityLow. With this configuration, the tasks did not run properly. When creating the tasks, NULL was not returned and no error occurred. After changing all task priorities to osPriorityNormal, the problem was fixed. I don't really understand why this happens. Each task has a reasonable osDelay(), so I don't think any specific task is blocking the others. Also, if a task were blocking, I would expect the same problem to happen even after changing the priority. I also tried changing the heap size and the stack size, but that did not seem to be the cause. Has anyone experienced a similar issue, or does anyone know why changing all tasks from osPriorityLow to osPriorityNormal would make a difference?    

Hello,I realized, that there are different informations about the features of LPUART1 in the datasheet and refmanual.The datasheets (at least DS15125 and DS15136) probably falsely specify in Table 8, that the LPUART1 features receiver timeout interrupt, modbus com and auto baudrate detection.In the refmanual (RM0522, Table 439) these features are specified as not supported. This seams to be the right information, when looking into CubeMX2, where the RTO for LPUART1 can not be activated. 

MCU STM32H503KBU internal clock  64 MHz   During a UART restart,the HAL_UART_Init function callsHAL_RCCEx_PeriphCLKConfig, which results in a HardFault_Handler   void UART_Set_BaudRate(UART_HandleTypeDef *huart, uint32_t BaudRate) { if (HAL_UART_DeInit(huart)!= HAL_OK) { Error_Handler(); } huart->Instance = USART1; huart->Init.BaudRate = BaudRate; huart->Init.WordLength = UART_WORDLENGTH_8B; huart->Init.StopBits = UART_STOPBITS_1; huart->Init.Parity = UART_PARITY_NONE; huart->Init.Mode = UART_MODE_TX_RX; huart->Init.HwFlowCtl = UART_HWCONTROL_NONE; huart->Init.OverSampling = UART_OVERSAMPLING_16; huart->Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; huart->Init.ClockPrescaler = UART_PRESCALER_DIV1; huart->AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; if (HAL_UART_Init(huart) != HAL_OK) { Error_Handler(); } if (

Hi everyone,I am experiencing a very specific initialization issue with a custom board based on the STM32WB55RGV6.We recently manufactured a batch of 30 boards. 22 of them are working flawlessly, but 8 boards fail to start the BLE radio on a cold boot (Power-On Reset). They all run the exact same firmware and have the exact same layout.Hardware details:MCU: STM32WB55RGV6HSE: 32 MHz crystal (CS06410-32M)LSE: 32.768 kHz crystalRF: MLPF-WB55-01E3 filter + Ceramic AntennaSymptoms & Debugging Steps Taken:No RF Output: Using an SDR and Near Field Probes, I confirmed there is zero RF energy being transmitted on the 2.4 GHz band during a cold boot on the faulty boards.HSE is Alive:

We are trying to do a firmware upgrade via UART to the N6 from another MCU, and having trouble getting it working. We do not have a USB host stack on that MCU so we're unable to use USB DFU.I've successfully been able to transfer and start the FSBL to the N6, but am unable to transfer the app image. Another detail is that our app image is ~540KB, so a bit too big to fit in the RAM buffer. Even a smaller sample image isn't able to work.Before I try a different bootloader or custom option, I just wanted to see if anyone else has had success doing this or if there is something I'm missing. Thanks.

I'm currently developing an external loader on STM32H563ZIT6 development board.I'm facing an issue on programming with cube programmer in the image belowThe problem I think might be linked to interrupt handler of systick. I've attached the Loader_src.c file where I had developed the functions used by Cube Programmer; also attached the linker used. The low level functions linked to XSPI communication are properly working, because I had tested in debug erasing and writing sectors. I need help to figure out the problem. 

hello,I encountered a problem while developing for stm32u585. When the stm32 wakes up from standby mode, the HAL_RCC_OscConfig() function occasionally fails, "Wait till LSI is disabled" timeout in HAL_RCC_OscConfig() (this project uses IWDG)The specific process is as follows:1. start boot HAL_Init(); SystemClock_Config(); MX_GPIO_Init(); MX_ICACHE_Init(); MX_UART4_Init(); boot to other address(app) 2. app init HAL_Init(); SystemClock_Config(); RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_LSI |RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.LSEState = RCC_LSE_ON_RTC_ONLY; RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.LSIDiv = RCC_LSI_DIV128; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.P

Hi I am trying to gain knowledge on TouchGFX and GUI, with STM32 controller. can you provide me with the document or example from where i can start my learning to use TOUCHGFX and use multiple screen. 

I am developing a custom embedded device that uses PIMA with USBX in order to access the SD card contents of my PCB from a PC through USB.When UX_PIMA_WITH_MTP_SUPPORT is enabled, the device is correctly detected by Windows and communication works properly.However, in order to correctly represent a hierarchical folder structure in Windows Explorer using MTP, I would need support for command 0x9805 (GetObjPropList, CMD 00000043). As far as I can see, USBX does not implement this command.To avoid implementing the full MTP property system myself, I wanted to use the more generic PIMA behavior instead, where the host requests ObjectHandles each time the user enters a folder, similar to how old digital cameras behaved.The issue is that when I disable UX_PIMA_WITH_MTP_SUPPORT, the PC no longer even recognizes that a USB device is connected. If I enable the macro again, everything works correctly.So my question is:Is disabling UX_PIMA_WITH_MTP_SUPPO

If the user uses "-Wundef" the header "stm32u3xx_hal_def.h" creates a lot of warnings due to a missing check if a preprocessor macro is defined before evaluating it.The warning gets emmited by the following #ifs used in STM32Cube FW_U3 V1.3.0 inside "stm32u3xx_hal_def.h":#if defined ( __CC_ARM ) || ((__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ )e.g. in line 142This is how it was correctly checked in e.g. the STM32Cube FW_G0 V1.6.3 in the hal def header for the stm32g0 hal:#if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) Best Regards

Environment:Board: STM32H7S78-DKMCU: STM32H7S7L8H6Stack: AzureRTOS USBX (PIMA MTP + CDC ACM) + FileX.Storage: microSD Card.Host OS: Windows 11 Preliminary Note:A significant portion of this code is adapted f

Hello everyone,I am working on a custom bootloader for an STM32H743-based TouchGFX project and facing a very strange issue specifically with the TouchGFX application after jumping from bootloader.STM32H743 Bootloader Successfully Jumps to Simple App but TouchGFX Application Shows Black Screen After Bootloader Jump.I would appreciate any guidance from people who have experience with STM32H7 + TouchGFX + bootloader integration.Hardware / Project DetailsMCU:STM32H743IIT6Frameworks:STM32CubeIDETouchGFXFreeRTOSPeripherals Used in TouchGFX App:FMC SDRAMLTDCDMA2D

I am a user of the NUCLEO-N657X0-Q board.I would like to use Keil MDK RTX5 RTOS together with Root of Trust.My development environment is as follows:1> Development tool: Keil uVision V5.422> Example source: STM32Cube\Repository\STM32Cube_FW_N6_V1.2.0\Projects\NUCLEO-N657X0-Q\Applications\ROT\OEMuROT_Appli3> Development board: NUCLEO-N657X0-Q4> Manage Run-Time Environment Setting I have added the osKernelInitialize() function to the main function as shown below.int main(void) { #ifdef PRI

Hi everyone, We are encountering a XSPI Deadlock on our STM32H7S7-Discovery board (STM32H7S78-DK).To provide some context, our system is configured as follows: External FLASH: Connected to XSPI1. Swapped through XSPIM to port 2 and operates in memory mapped mode. MCE1 is activated across the entire address range using the AES-STREAM Cipher. External PSRAM: Connected to XSPI2. Swapped through XSPIM to port 1 and operates in memory mapped mode. MCE2 is activated across the entire address range using the NOEKEON-BLOCK Cipher. The issue occurs when running an LZO decompression algorithm. The algorithm reads compressed data from the PSRAM and writes the decompressed output back to the PSRAM, while the code is being executed on External FLASH. At some point during decompression, the core completely freezes, no HardFault or BusFault is triggered, and the debugger

Is there a prize for the most trivial post? Opened up a new Nucleo-L476RG board (finally worked my way through the 10+ boards I bought a number of years ago) - it comes in a cardboard box now, nice. The Leds (LD1, LD3) were so bright, I couldn't probe anywhere around the micro or connectors without squinting. So I replaced the resistors for these Leds (1K, 100?) with 22K, things are much more mellow now. Most people are using these boards indoors, the Leds only have to be bright enough for people to notice - not beaming out like the Eye of Sauron.  Anyway, something for you to think about. Meanwhile, there's a few annoying clouds outside I need to shout at....

Hi there, I have firmware that uses UART1 and UART2 of the STM32G4 series. Both are intended to run on interrupts, but as soon as any signal is received by the MCU, an error occurs, causing HAL_UART_AbortCpltCallback to be called. Therafter, the interrupt no longer works. Are there any known issues with the interrupt on these STMs? Based on previous forums, people were limited by stack size and prefetch. However, different to those cases, my code doesnt enter a hard fault, rather it just hits the function: HAL_UART_AbortCpltCallback.The error that comes up during debug starts here in the hal code:/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); /* Configure Rx interrupt processing */

About EVSTSPIN32G4, I started the code generated by MotorControl Workbench 5. Y.3 normally.If you transplant the IIC configuration of the pre drive and enable PWM output, the VDS will report an error.After carefully reading the generated code, it is found that before PWM complementary output, the lower tube is opened for charging, and the output PWM pre drive or VDS protection is written. Is there a routine for STSPIN32G4 IIC to configure PWM output?

Hi STM Forum,I'm integrating a custom QSPI display controller with TouchGFX and ThreadX. I need to convert the TouchGFX framebuffer into RGB666 (6 bits per color) for a custom display interface that runs over SPI/QSPI.Here is my IOC. As you can see, I currently have only the QSPI and the clock connected.