STM32 MCUs

Subject: MC Workbench 6.4.2 — Custom Power Board JSON: 'No algorithm available' and missing connection paths errorDear ST Motor Control Support Team,I am writing to request help with creating a custom power board JSON template for MC Workbench 6.4.2.I have a custom BLDC motor control board using the TI DRV8316CT 3-phase integrated FET driver connected to a NUCLEO-G431RB (STM32G431RB). I have created a custom power board JSON file and placed it in the boards/power/ folder, but when I select it in MC Workbench I get the following errors:1. "Mandatory Phase Voltage Generation feature is not defined or there are not connection paths between hardware signals and relative MCU resources for the feature."2. "Mandatory Current Sensing Feature for FOC/HSO algorithm is not defined or there are not connection paths between hardware signals and relative MCU resources for the feature."3. "No algorithm is available for this hardware configuration."M

I am running the Analog Devices EVAL-ADE9430 board and noticed if I enable CRC checking reading 32 bit registers fail while 16-bit registers always pass. I trace it down to the  AFERead16BitBuffer() function not returning a status after reading the register over the SPI bus. This allows 16 bit register reads to work all the time while 32 Bit registers fail all the time (that's another story).   See line 12 below:     HAL_SPI_Receive(&hSPI, (uint8_t *)&pData[0], 2 * numSamples, SPI_TIMEOUT); uint32_t AFERead16BitBuffer(uint16_t addr, uint16_t numSamples, uint16_t *pData) { int32_t status = SYS_STATUS_SUCCESS; cmdBuffer[0] = (addr >> 4); cmdBuffer[1] = ((addr & 0x0F) << 4) + 8; HAL_GPIO_WritePin(GPIOD, GPIO_PIN_14, GPIO_PIN_RESET); status = HAL_SPI_Transmit(&hSPI, (uint8_t *)&cmdBuffer, 2, SPI_TIMEOUT); if (status == 0) { HAL_SPI_Receive(&

Good afternoon,I am working with the STSW-TTM005 example for a resolver-equipped motor and encountered an issue:Link: STSW-TTM005 | Product - STMicroelectronicsThe motor does not rotate, but instead oscillates between windings.In sensorless mode, the motor rotates correctly.During debugging, the resolver angle appears correct.I tried changing that setting:#define RESOLVER_ANGLE_OFFSET_DEGREE 185.0f // Angular offset in electrical degrees between the resolver and the rotor's magnetic flux, but it didn't workCould you please clarify which resolver-equipped motor was used to validate this solution? My setup is as follows:Control board: NUCLEO-G431RBDriver board: based on DRV8353Resolver board: STEVAL-TTM005AFirmware v

Hi, I'm developing a board to control motors using FOC. For this, I will use the MC workbench tool to generate the code. However, when I describe the hardware in the shunt resistors section, there is no "in-line" option, only the low-side option, but my board only has them in-line and I can no longer modify it. What can I do in the code to be able to use the shunt resistors in this way?

 Hi everyone,I wanted to share a project I’ve been building over the last few years. It’s called Mk, an operating system built entirely from scratch for the STM32F746G-DISCO and STM32F746G-Eval2 boards.These boards are powered by an ARM Cortex-M7 running at 216MHz. Initially, my goal was just to implement a small scheduler, but I stacked layers one after another to make it as complete as possible. Currently, I think I've added enough layers to claim it as a functional, lightweight OS.Mk features:

Hello,   I am working on I3C private transfers. When I build the context buffer with HAL_I3C_CTRL_BuildTransferCtxPrivate I get an assert when IS_I3C_PRIVATE_MODE is checked against HAL_I3C_PRIVATE_WITH_ARB_RESTART. Is the exclusion of HAL_I3C_PRIVATE_WITH_ARB_RESTART from the macro below intentional? stm32c5xx_hal_i3c.c: line 574 #define IS_I3C_PRIVATE_MODE(MODE) (((MODE) == HAL_I3C_PRIVATE_WITH_ARB_STOP) \ || ((MODE) == HAL_I3C_PRIVATE_WITHOUT_ARB_RESTART) \ || ((MODE) == HAL_I3C_PRIVATE_WITHOUT_ARB_STOP) \ || ((MODE) == HAL_I2C_PRIVATE_WITH_ARB_RESTART) \ || ((MODE) == HAL_I2C_PRIVATE_WITH_ARB_STOP) \ || ((MODE) == HAL_I2C_PRIVATE_WITHOUT_ARB_RESTART) \ || ((MODE) == HAL_I2C_PRIVATE_WITHOUT_ARB_STOP))  Thank you, -Gil

Hello, I am looking for an example of how to use private I3C transfers for STM32C562RE. I read the I3C examples posted on Github but I did not find any controller or target examples that use HAL_I3C_CTRL_Transfer_DMA and HAL_I3C_TGT_Receive_DMA for private transfers using HAL2. Your help would be appreciated,Gil

I am currently working to redesign one of our products to include Bluetooth communication for remote control. For this, I am targetting the STM32WBA23.Given that the PCB is mounted inside a solid, cast-aluminium housing, I will need to put the antenna on a seperate board and connect it with a cable to the main PCB.My question now is: Where do I put the tuning components? Do I place these on the main PCB, close to the controller, or do I put them on the antenna board?Or maybe it doesn't actually matter. I would appreciate any comments and directions by those more RF savvy than me.

Hi everyone,I am working on a project using BNO085 IMU sensor and STM32H7A3ZIT6Q. I have a single sensor working but stuck at 44Hz. The same sensor with SparkFun library on ESP32 achieves 1.2ms read time. I need help understanding why and how to match ESP32 performance on STM32.Hardware:NUCLEO-H7A3ZI-Q (STM32H7A3ZIT6Q, Cortex-M7 @ 280MHz)Adafruit BNO085 breakout boardI2C on PB8 (SCL), PB9 (SDA), PC0 (INT pin)P0 and P1 tied to GND (I2C mode, address 0x4A)Software:STM32CubeIDE with HALOfficial CEVA SH2 library from github.com/ceva-dsp/sh2REPORT_INTERVAL_US = 2500 (targeting 400Hz)SH2_ROTATION_VECTOR (9-axis full quaternion)STM32 performance achieved so far:I2C 400kHz polling: 28Hz, read_ms = 32msI2C 1MHz Fast Mode Plus: 44Hz, read_ms = 19msINT pin wait inside sh2_hal_r

Recently, I was trying to implement SDMMC+DMA+SDFAT to read and write the SD card of my Class on the STM32H750VBT6. Then I found that the DMA of SDMMC was gone. I saw some online materials saying that MDMA needs to be configured, and some also said that SDMMC does not need to configure DMA as it has its own independent IDMA bus. What is the actual situation when it is directly mounted on AHB? Are there any configuration screenshots and programs of CubeMX for SDMMC+DMA? I'd like to refer to it. Thank you!

There seems to be a documentation error between DS14053 Rev 4 and RM0492 Rev 3.  In the data sheet, section 3.17, table 3, "ADC Features" we see a different set of features compared to the reference manual, section 19.3, table 107.  The data sheet claims oversampling up to x1024, a data register of 32 bits and gain compensation is supported.  The reference manual claims oversampling up to x256, a data register of 16 bits and no gain compensation.The register set description only has oversampling fields with values up to 256.  It would be helpful if ST could correct whichever document is wrong, and if the reference manual is wrong and oversampling up to x1024 is supported, then please also correct the register definitions.Thanks,TG

Dear. AllI'm asking how to use STemWin on stm32h743 mcu.How to add STemWin on STM32CubeIDE? (Current Use Version. 1.13.0)?How can I run a project with the development board I bought? (STM32H743I-EVAL)?In particular, I want to run the STemWin_SampleDemo project.I`m use IAR EWARM ver 9.xx but in stm32cubeh7-v1-12-1 andSTM32Cube_FW_H7_V1.11.0\Repository\STM32Cube_FW_H7_V1.11.0\Projects\STM32H743I-EVAL\Demonstrations\STemWini find STemWin.ewp project which use OGLastSavedByProductVersion 8.20.2.14834.It mean`s STemWin.ewp should compile on EWARM 8.20 or late.Is it possible to use example on later version EWARM ?Best regards.

Hello everyone：On touchgfx support website:https://support.touchgfx.com/docs/development/scenarios/touchgfx-on-gpu2d ,there is a demo of map using NeoChromVG,this is the demo videoSo,where can I get this demo project?

STM32H743VGT6 how to use slave I2C+DMACurrently, this usage is fine. However, when using the DMA function, it will trigger an ER interrupt.HAL_I2C_Slave_Seq_Receive_DMA, How to use it? Are there any examples?// 从机地址匹配回调函数 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) { if (hi2c->Instance == I2C1) { if (TransferDirection == I2C_DIRECTION_TRANSMIT) { Rx_len = 0; memset(I2C_rxBuffer,0,4); HAL_I2C_Slave_Seq_Receive_IT(&hi2c1, I2C_rxBuffer, 1, I2C_FIRST_AND_LAST_FRAME); } else { HAL_I2C_Slave_Seq_Transmit_IT(&hi2c1, I2C_txBuffer, Tx_len, I2C_FIRST_AND_LAST_FRAME); } } } 

I'm using the latest library provided by the STM32Cube_FW_G0_V1.6.3, specifically STM32Cube_FW_G0_V1.6.3\Drivers\CMSIS\DSP\Lib\ARM\arm_cortexM0l_math.libbut when using IAR 9.20 I'm having the warning Warning[Lt009]: Inconsistent wchar_t size arm_sin_f32.o(arm_cortexM0l_math.lib) and 1 other objects in arm_cortexM0l_math.lib have wchar_t size 16 bits my_file.o and 54 other objects, some of them in rt6M_tl.a and 5 other libraries have wchar_t size 32 bits How do I avoid the mismatch?I would like to avoid to link the source code for the cortex M math library and compile it myself.

Hi everyone,I am encountering a HCI_HARDWARE_ERROR_EVENT with code 0x02 (BlueCore time overrun error) on STM32WB devices.Key observations:Issue is observed only on some units, while others operate normallyAll devices use the same firmware, BLE stack, and FUS versionsAffected units show unstable BLE behavior (disconnects or degraded performance)Validation performed:Tested with STM32 reference example (BLE_p2pServer)The issue is still reproduciblePCB layout and hardware design have been reviewed and validatedNo application-specific changes involved during testingQuestions:Root causeWhat typically triggers a BlueCore time overrun at the controller level?Does this point more toward hardware timing issues (clock accuracy, RF timing), or internal controller or stack conditions?Unit variationHa

We are a bachelor project group developing a BLE Direction Finding handheld "tracking compass" using AoA on STM32WB09 devices.We have reached a stage where BLE communication, CTE reception, antenna switching, and IQ report generation all appear functional, but the resulting IQ data seems physically incorrect and causes unstable angle estimation.We would appreciate suggestions on possible RF or IQ-processing issues we may have overlooked. Environment:MCU:PCB1) STM32WB09KE (Compass)PCB1) STM32F446RE as processing unitPCB2) STM32WB09KE (Tracking Tag)STM32CubeIDE Version: 2.1.0Toolchain / IDE: STM32CubeIDE. In this page, ST provides a .zip folder containing

Hi, I'm using the STM32C071K8U6's built-in USB DFU bootloader for one-time production programming. After flashing, PA11/PA12 (USB D+/D-) are used as regular GPIO outputs to control two P-MOSFETs (each with their 100kΩ gate pull-ups to 4.2V).   The USB functionality is not used by the end customer, but the USB connector remains accessible for charging. This means a PC's USB cable may be connected during normal use allowing for potential signal injected into those traces resulting into the PMOS being turned on/off by the PC if it detects there is a USB device connected and tries to enumerate it.   The two core issues: a) When a user plugs into a PC for charging, we need to guarantee the host does not attempt enumeration, and that nothing the host does on D+/D- interferes with our GPIO-driven MOSFET gates. b) because the&nb

Hello,I would like to ask about the UFQFPN32 package footprint for the STM32G491KEUx device.We are using the following part:Part number: STM32G491KEUxPackage: UFQFPN32While reviewing the datasheet and package information, we found that the actual UFQFPN32 package appears to have an exposed pad (EP) on the bottom side of the package.However, in the datasheet/package information we reviewed, the UFQFPN32 package information and footprint example do not seem to include the EP or the EP land pattern.In particular, the UFQFPN32 package information is shown in the document from page 166 to page 168, but we could not find any information regarding the exposed pad or the recommended PCB land pattern for the EP.Could you please confirm the following?

Hi everyone, I'm facing issues connecting an external debugger to the NUCLEO-H7S3L8 board (STM32H7S3L8). Current Setup: Board powered via CN5 (ST-LINK USB) JP1 closed (to disable on-board ST-LINK) External debugger connected to CN1 (MIPI20 connector) SWD mode at low speed (500 kHz to 1 MHz) Correct power sequence: Power CN5 first → wait for COM LED (LD8) to stabilize → then connect external probe What I have already tried: BOOT0 = 1 (jumper on CN11[5-7]) to enter bootloader mode and halt using external debugger Internal

  Hello ST Team, I developed a custom USB DFU HOST class on an STM32F446ZE. I soldered a USB-C cable directly to the D+/D-, 5V and GND pins. The Problem: The stack works correctly for transfers up to 128 bytes. However, when I set phost->Control.setup.b.wLength.w > 128 (e.g., 192 bytes) and call USBH_CtlReq, the code enters an infinite loop inside USB_WritePacket. I have traced the execution line-by-line, monitoring the HCTSIZ register values: size (Transfer Size) and cnt (Packet Count). Below is the detailed trace comparing a working 128-byte transfer vs. a failing 192-byte transfer. 1. Successful Scenario: Transferring 128 Bytes Initial State: size = 128, cnt = 2. Loop Iteration 1: i=15: USBx_DFIFO written. Register updates: size = 64, cnt = 2. i=

Hello, I have a device with a variable message stream in UART and there is the issue that I cannot know when it's stream ends due to gaps (so a single ReceiveIdle won't work). The device has clear framing via an interrupt so I use that.The final system will have limited DMA channels so keeping a ReceiveIdle always set is wasteful.As such there is the following workflow:HAL_GPIO_EXTI_Callback gets a signal there is a new message. That arms the DMA listener. On DMA callback, HAL_UART_Receive_IT is armed to catch possible remainder of message.On HAL_UART_Receive_IT it arms another DMA to get the rest of the stream (instead of doing a byte by byte interrupt, which is slow)We get another callback and stop the DMA/IT or we loop on IT and DMA.The issue is if this workflow is safe? Is there an issue arming DMAs on callbacks or IT on DMA callbacks?Thank you&nb

The issue feels really simple, and it's easy to do on N6. At the core, I am running out of MPU regions as there are only 8 available. So it would be nice to have a small chunk of SRAM, where privileged code can share data with unprivileged code. Say a status or something like this.GTZC only controls both read and write. So I cannot say that a single 512 byte block is read/write for privileged code, but read only for unprivileged.  

Title updated to better reflect the root problem; was originally 'Riverdi 12.1" + TouchGFX 4.25 + FATFS not working'Hi everyone,I am working on a Riverdi 12.1" display board based on STM32H7 with TouchGFX 4.25 generated project.Environment:TouchGFX 4.25STM32CubeMX generated projectSTM32CubeIDERiverdi 12.1" boardSTM32H7FreeRTOS enabledDebugging with ST-LINKProblem:BSP_SD_Init() returns MSD_ERROR_SD_NOT_PRESENT.In main.c:uint8_t res; res = BSP_SD_Init(); risultato = res; if(res != 2) { Error_Handler(); }The value stored in risultato is:MSD_ERROR_SD_NOT_PRESENTAdditional important behavior:Whe

this thread is split from this thread hello Last question, I just saw the example but it's not for the STM32H755ZI-Q series, are the examples still compatible with this STM32H755 series? Thanks