STM32 MCUs

I have a STM32U585 (edit: ...VIT6, so not the one where this doesn't work due to errata) product with Trustzone enabled, Bootlock disabled and RDP level 0.I want to bring this into ST bootloader mode from software (for easy Firmware change via USB).To my understanding that would mean implementing the last entry of Pattern 12 from AN2606 

Hello,I am designing a high-speed data logging architecture using STM32H743VIHx. I would like the community to validate my DMA architecture and answer specific questions about eMMC access. I did not find answers in the forum and I am also not an expert in microcontroller hardware/software architecture. --- SYSTEM OVERVIEW ---The logging produces a continuous signal sampled by the ADC. I need to log raw data samples along with GPS and IMU data to an eMMC for post-processing.Key parameters:- ADC: 14-bit dual interleaved on PA6 (ADC12_INP3), differential ~10 MSPS effective- eMMC: S32 GB, eMMC 5.1- SDMMC1 in 8-bit MMC mode- IMU: on SPI2 (PB12-15) at 8 kHz- GPS: on UART4 at 115200 baud --- PROPOSED DMA ARCHITECTURE ---Four concurrent DMA paths:1. ADC1+ADC2 interleaved → DMA1_Stream0 → AXI SRAM (ping buffer)Triggered by ADC1 EOC, reads CDR register (32-bit = 2 interleaved samples)

ST moderator: updated the title to be more concise according to the below exchanges. Hello All,   I am facing a problem for debugging one of the board which uses stm32h7 controller. I am not sure why this is happening but on other board I am able to debug it, but for first one its not working. Though the code and debug config settings are same for both the board and using same system to debug both, but on one board I am able to debug while on other its is not. so could you please tell me what I can try to resolve this issue.   Thanks, SD 

  Hello ST Community,I am working on STM32H7B3LIH6Q with TouchGFX.I have successfully initialized the TFT RGB display on hardware, and the RGB test output is working properly. I created two screens in TouchGFX Designer, where pressing a touch button on Screen 1 should open Screen 2.This works correctly in the PC simulator, but on actual hardware the touch command/button press is not working. The display is visible, but touch input is not detected.I have attached the hardware output image and my touch enable/source code for reference.Could anyone please suggest what I should check in the hardware touch interface? Is the issue likely related to , BSP touch driver, I2C touch controller initialization, or touch coordinate mapping?Thank you,Vijaya.

Hi, I have all configured using internal loop FDCAN1 and there is not working on my STM32G474RE-Nucleo board 

Hi, We are busy making a setup with 2 nucleo-c092rc boards. Our first test was to send from board 1 to board 2 by the integrated CAN interface on these boards. We started at 1Mbits and this worked great. Also on 4Mbits the setup worked great. But we also want to test this on 8Mbits and now the transmitter is not sending correctly. We only see that the arbitration phase is send out and a couple of bits of the data part, but then the transmitters stops sending. We have tried with internal HSI(48Mhz) and external HSE crystal which is also 48Mhz on the nucleo boards.  We calculated the values for the SyncJumpWidth and timeseg1 and 2 and also tested with values slightly altered. hfdcan1.Init.DataPrescaler = 1; hfdcan1.Init.DataSyncJumpWidth = 2; hfdcan1.Init.DataTimeSeg1 = 2; hfdcan1.Init.DataTimeSeg2 = 3; But we allways have the same outcome. Sometimes it's not sending anyth

This is some feedback for the STM32C5 OEMiRoT example provided by ST.This is based on the STM32C5-MCU-HAL2.0.0 pack download 06-05-2026.Attached you can also find the CMake Config files for the example, specifically for the NUCLEO-C542RC board.General Bug Provisioning Python ScriptThe provisioning python script has a small bug when it comes to the prebuild script which adjusts the linker files.These files are compiler specific so the correct adjustment function needs to be called.This compiler dependent code is missing in the `_update_linker_define()` function in `STM32C5-MCU-HAL/rot/rot_provisioning/helper/project/project_generic.py` starting at line 318:linker_path = self.config.get_compiler_linker(compiler) value = f"0x{self.flash_layout.get_flash_layout(define):X}" update_define_in_file(linker_path, define, value)

Hello, ST expert For GPIO structure, what are the differences between FT and TT mode? Are there any differences for the ESD diode and the other diode in these two modes?     BR Yang  

I am working on UART communication between an STM32H563 and a Raspberry Pi CM4.Currently, I am using UART without hardware flow control (RTS/CTS disabled). During continuous communication, I am frequently getting ORE (Overrun Error) on the STM32 side.Configuration details:MCU: STM32H563Communication: UARTFlow control: DisabledUART mode: InterruptPeer device: Raspberry PiI would like to know:1. What is the best workaround to avoid ORE errors without enabling hardware flow control?2. Is it reliable to use UART communication continuously without RTS/CTS?3. What are the recommended UART settings or software handling methods for STM32H5 series?4. How should ORE recovery be handled properly in STM32H563?Currently, once ORE occurs, The data became lost.

Hi All,I've just been watching an ST tutorial video on how to implement  bare-metal Device CDC USB  on an STM32U3.During the video, the lecturer says that the code is available within the workshop download. No link is provided to the workshop code....Does anyone know where I can find it? This is the video in question : https://youtu.be/m8ph9JIY5QE?list=PLTJzs51NlEIAHFfePhKJPsnWvT5XidJuU&t=1164Any help would be appreciated.CheersMichael 

Hello ,I am working on a project with the STM32L562CET6 microcontroller and have encountered an issue with the timer interrupt callback function.   1. I configured TIM6 as the clock source for the microcontroller. Consequently, the HAL_TIM_PeriodElapsedCallback() function is automatically triggered whenever the TIM6 interrupt occurs.   2. Now, I have configured TIM2 for a different purpose, but I noticed that when the TIM2 interrupt occurs, the same HAL_TIM_PeriodElapsedCallback() is triggered.Since the HAL_TIM_PeriodElapsedCallback() is defined with the weak attribute, I understand that I can redefine it in my user code. However, this causes conflicts when multiple timers (like TIM6 and TIM2) trigger this callback.Questions:  1. Is there a way to alias or redirect the HAL_TIM_PeriodElapsedCallback() to separate functions for different timers (e.g., one for TIM6 and another for TIM2)?  2. Is there any othe

Hi All,    I want to do something very basic, but somehow cannot manage to do it. What happens if you have a PWM signal on an IO Pin, generated by a timer, and you disable the timer?  What happens to the physical IO Pin ? Is it stuck at the state where it was when you disabled it ?, Does it go Low ? Or High. The Idle state of the Timer is Low, and the On state High.    Thanks,  DJ 

Hello ST Community team,I would like to report a possible inconsistency in the STM32 MCU Portfolio Selector regarding Ethernet filtering for the STM32C5 series.While selecting MCUs using the Portfolio Selector, I filtered devices through:- EthernetThe reference STM32C593CET6 appears as supporting Ethernet functionality. However, according to DS15136 (Table 1), this specific MCU does not include the Ethernet peripheral.This may create confusion for developers, especially since the STM32C5 family is still relatively new and many users rely on the Portfolio Selector during early device selection.Could you please review and correct this behavior.Ps: more details available on this post. Best Regards.II

Hello everyone,I am currently working with the Aliro software expansion for STM32Cube using the new STEVAL-ALOCKCB board (Aliro access control reference design based on STM32WBA65RI, ST25R300, and STSAFE-A120).Both the hardware and software are in their original, unmodified state from ST. The nfc12ble project builds successfully without any issues.However, I am encountering a consistent problem:the function CryptoInit() always returns false.From debugging, I can see that the failure originates from the CheckReaderPubK() function, which internally calls isValidProvisioning(). This function also returns false, causing the entire initialization to fail.It seems that the provisioning structure is not considered valid. In particular:The check prov->isValid == DEVICE_PROVISIONING_STRUCT_IS_VALID fails.DEVICE_PROVISIONING_STRUCT_IS_VALID

Dear STMicroelectronics Community / Support Team,I hope you are doing well.I am currently working with the STM32N6 Discovery Kit and noticed that it uses an external Octal NOR flash device with the part number MX66UW1G45G. However, I have been unable to locate a public datasheet for this exact component.I was able to find datasheets for similar parts such as MX66U1G45G and MX66UM1G45G, but not for the “UW” variant used on the board. This has led to some confusion regarding the exact specifications, supported features, and command set of the device.I would appreciate your guidance on the following points:Is MX66UW1G45G a custom or internal part number used specifically for STM32 evaluation boards?Is there a publicly available datasheet for this device, or can it be s

Hello, I am working on an SNMP implementation using STM32H753ZI with the LwIP Ethernet stack. Currently, SNMP v1 is working successfully, including trap generation and reception testing using Net-SNMP tools. I am able to send enterprise-specific traps from the STM32 device. Below is the trap code currently working for SNMP v1: void send_temp_fault_trap(void) { static const u32_t enterprise_oid_arr[] = {1,3,6,1,4,1,50598}; struct snmp_obj_id enterprise_oid; enterprise_oid.len = LWIP_ARRAYSIZE(enterprise_oid_arr); memcpy(enterprise_oid.id,enterprise_oid_arr,sizeof(enterprise_oid_arr)); ip_addr_t dst; IP4_ADDR(&dst, 192,168,0,255); snmp_trap_dst_ip_set(0, &dst); snmp_trap_dst_enable(0, 1); static const u32_t msg_oid_arr[] = { 1,3,6,1,4,1,50898,10 }; static struct snmp_varbind vb; static struct snmp_obj_id msg_oid;

Hello everyone,I have encountered a strange issue with my UART transmission function on an STM32 microcontroller operating in Half-Duplex Open-Drain mode.Currently, the function works perfectly fine without checking the TC flag. However, when I add a check to wait for the transmission completion at the end of the function, my logic analyzer shows completely garbled bytes (corrupted data).Here is the code that works perfectly (without the TC check):void send_array(uint8_t *arr, uint8_t size) { /* Receiver disable */ USART3->CR1 &= ~(CR1_RE); for (int i = 0; i < size; i++) { /* Wait until Transmit data register is empty */ while(!(USART3->SR & SR_TXE)){} /* Send byte */ USART3->DR = arr[i]; } /* Receiver enable */ USART3->CR1 |= CR1_RE; }And here is the modification that breaks the transmission and leads to garbled bytes on the a

Good day,We are using a composite USBX device class combining CDC and MSC over USB Full Speed, built on X_CUBE_AZRTOS-H7 version 3.3.0 (USBX 6.4). During testing we discovered that a certain Windows PC sends a MODE SELECT(10) command (opcode 0x55) and causes an endpoint stall.After a rather long debugging session, it was found that the USBX source _ux_device_class_storage_mode_select() is explicitly not implemented — it stalls the OUT endpoint, UX_FUNCTION_NOT_SUPPORTED (which is not checked in the thread) and never recovers:

Hi,I am using the STM32F407VET6 chip to simulate the SENT protocol. I have encountered some issues and would appreciate it if professionals in the forum could provide some answers.1.Since the SENT protocol signal needs to change the output waveform based on the transmitted data, I attempted to use the TIM BURST feature of the chip to simulate the SENT signal. I am configuring it using STM32CubeMX software. Below are the relevant configurations: 

Subject edited to mention ARM64 - p.a. Hi everyone, I am having trouble getting my STM32 NUCLEO - F411RE setup. When I attempt to run a simple program through CubeIDE I am met with "NO ST-LINK detected! Please connect ST-LINK and restart the debug session." It also returns the same error when I attempt to run other programs.Here's what I have tried thus far :      - In my Device Manager I can see "ST-Link Debug" which has the status: "The drivers for this device are not installed. (Code 28) There are no compatible drivers for this device. To find a driver for this device, click Update Driver." I've tried both the "search automatically for drivers" and "Browse my computer for drivers" (using C:\Users\jthom\OneDrive\Desktop\stsw-link009\amd64), however both have thus far failed.     - Restarted computer multiple times

我正在写BootLoader的程序，我想要实现IAP，我目前编译后生成的.bin文件大小为18kb（之后代码多了还会再增加），但是我APPUP区空间为248KB，我的配置为： Translation (by google translator): "I'm writing a BootLoader program and I want to implement In-App Access (IAP). The .bin file I'm currently compiling is 18kb in size (and will increase as the code grows), but my app upload space is 248KB. My configuration is..." 我想要实现生成的.bin文件为248kb，不够的地方自动填充，我的生成.bin的指令如下 "I want to generate a .bin file that is 248kb in size, with automatic padding if necessary. My command to generate the .bin file is as follows:"

Hello,I've been adapting the DRP1M1 USB-PD DRP reference design for use on a custom STM32U5A9 Board, and have run into an issue where it seems like ST's compiled USBPD library just stalls during negotiation as a SRC device.Hardware: STM32U5A9, custom board with TCPP03-M20Library: USBPDCORE_PD3_FULL_CM33_wc32.aConfiguration: DRP, PD3.0## ProblemOperating as SRC, the PE state machine sends ACCEPT in response to a REQUEST but never advances to PE_SRC_TRANSITION_SUPPLY. PS_RDY is never sent and the port partner eventually triggers a hard reset.## What We Have Verified**Protocol layer is working correctly:**- SOURCE_CAPABILITIES sent and GOODCRC received- REQUEST received and GOODCRC sent- ACCEPT sent and GOODCRC received- All confirmed on protocol analyzer**All DPM callbacks returning correct values:**- USBPD_DPM_EvaluateRequest() returns USBPD_ACCEPT (verified via debugger)- USBPD_PWR_

The AN3156 explains on page 18 the Read Unprotect Command:This command is selected when wValue = 0 and the first byte of the buffer sent by the host is 0x92. The buffer length is only one (the command) byte.The host sends a DFU_DNLOAD request with the above parameters to remove the read protection of the internal flash memory.   It is very useful that you implemented a command to remove the read protection.But this is useless if there is also a write protection active.The user has no way to remove a write protection over the DFU protocol.Why does this command not remove both: The read protection AND the write protection at the same time?Why does STM implement nothing that allows to remove a write protection ?

The STM32G0B1 has a very ugly bug in the bootloader.When I have a write protection on a flash memory area:WRP1A_STRT = 0x0 --> 0x08000000WRP1A_END = 0x1 --> 0x08000800 and then I upload a new firmware to this area the firmware will not be written, because this area is write protected.This is correct.But it is a horrible bug that I send a USB control request withRequest.Function=URB_FUNCTION_CLASS_INTERFACE;Request.Direction=VENDOR_DIRECTION_IN;Request.Request=DFU_GETSTATUS;Request.Value=0;Request.Index=0;Request.Length=6;Result = STDevice_ControlPipeRequest(hDevice, &Request, (BYTE*)pkDfuStatus);and the buggy bootloader returns STATUS_OK (value 0) instead of STATUS_ErrorWRITE (value 3) The user thinks that the firmware was uploaded correctly but the processor is dead because the flash memory is corrupt.  

Title edited to clarify that the "onboard PHY" refers to a Nucleo-H753ZIi have may issues related to implement the ethernet on stm32h753zi mcu like i am not able properly configure the mpu regions and linker script and its ethernet.c file ...and also have issue related to ping the static ip...if any supporting link related to this issue can be provided..that might be helpful