STM32 MCUs Products

Hello,I am developing an application on STM32H563 MCU and NUCLEO board.I have the following problem when trying to configure USART2 RXFIFO threshold.In particular, on a transmission completed event, inside the ISR, I need to configure the RXFIFO threshold based on the expected number of bytes to receive.I try to do this, using the LL_USART_SetRXFIFOThreshold(), but I see that it doesn't have effect on the RXFTCFG bits of register CR3, that remains stuck at 0.What am I doing worng?Regards,Carlo

Hi!I'm using STM32H745 dual core. The reason behind it is as I have to do very fast measurement on one core (M7) and the rest of the slower things on the M4. The M4 is mostly used for communicating with the external world. I have setup SPI3 and SPI4. SPI3 is on the M7 and the SPI4 is on the M4. SPI3 is the slave. SPI4 is the master. I have used this example to get the cores to communicate, which works!What I'm trying to achieve is for the M4 (master) to use the transmitreceive function (it can be in any mode - polling, it or dma) to send config data and receive measurement data from the M7. For now I can use the given example. What I'm trying to do is to move the SPI receiving, packing the data and

I'm looking at https://www.st.com/resource/en/application_note/an4187-using-the-crc-peripheral-on-stm32-microcontrollers-stmicroelectronics.pdf. It says:Two examples are described, with the measurement of execution time:• CRC_usage example: how to configure the CRC using the CPU as data transfercontroller.• CRC_DMA example: how to use the DMA as CRC data transfer controller.Where can I find that CRC_DMA example? 

I am using ADC regular simultaneous mode with stm32f427It works nice with the pulse signal is comming after dma start(HAL_ADCEx_MultiModeStart_DMA)but if the signal is comming before calling ADC dma start code it going to infinityhow to solve this?i think at the first start with ADC interrupt code and check the pulse is commingand if there's not stop interrupt adc, and start dma code and check ADC cplt callback funtion for infinity..but i think there's somthing i did wrong for ADC DMA start or there would be some parameter for block this casewhat should i do?

Hello,I am trying to generate a pulse-triggered waveform continuously by using DAC and DMA in STM32H735RGV6. To do this, I have opened DAC OUT1 with the following configuration.After that, I set up the TIM12 with the following configuration and expected that the DAC output would be synchronous with the timer but I got nothing out of the DAC.I am not sure about that I have done all the necessary things. I need help from the one who did the same thing or has the information on DAC synchronization with a timer pulse.Could you help me on this?Thanks

Greetings,This is a revival of this question but refocused on the actual line of code iteself. Also, I thought that I may have better luck on this board instead.We have a problem where a certain call of memcpy overwrites/corrupts memory elsewhere, but this seems to not be a simple case of overflow since the place that gets corrupted is before the destination, i.e. the address's value is lower, i.e. 'behind' instead of 'ahead'. Furthermore, when I look at the values of all the relevant parameters and even the registers at the assembly-level, everything seems to be within bounds and in order.The context of the memcpy is that we are copying bytes of a custom protobuf packets from the USB RX-buffer in CDC_Receive_HS callback to our own FIFO ring-buffer.What happens is th

Hello, we are a manufacturer company that uses STM products. We developed a device using stm32f410 and stm32f446 products 2 years ago. We have a few processors from this old series, stm32f410 and stm32f446, and they work without any problems. However, the new stm32f410 and stm32f446 processors we bought do not work on the same card we developed 2 years ago. Periodically, the processor enters an endless reset loop. When we look at the CUB IDE debugger, we see that PADRST is active in the CSR area. But the reset input is not active. We have 200 new stm32f410 products. We cannot solve the problem. Please can you help?Thank you in advance for your help.

Hello, I currently have a test bench project to carry out, so it's a drive motor that turns another motor, which generates an FCEM signal on my 3 phases, but the duration of the signal depends on the speed at which I'm turning, so I'd like to use timer 1 on the STM32F103C8T6 to count the number of pulses between 2 rising edges, if you could help me. I'm using an rx tx link to have a master and a slave, the master at a frequency of 93.5 kHz on the cpu and I'd like to know if it's possible to count the number of pulses from my 3 phases at 72 MHz. If you could help me please thank you. i changed spi to usuart

Hi,maybe I don't know how/where to look, but I can't find any info why in datasheet for STM32G473 there is the max value for T_trig (external trigger period) in ADC timing characteristics (see the attached image). I several datasheets for several other families and there was maximal value for f_trig instead, which seems perfectly natural to me.Could anyone point me in the right direction?Thx

Hello everyone,  I have a bunch of questions concerning the environmental impact of manufacturing a STM32  I'd like to see the impact according to as many criteria as possible from the following:  Contribution to the greenhouse effect  Particulate matter and respiratory effects of inorganic substances  Air acidification  Photochemical ozone formation 

Hello everyone,I am new to hardware programming so please excuse my basic question. Can someone please point me to the right resource to obtain data from an external pdm microphone (https://learn.adafruit.com/adafruit-pdm-microphone-breakout?view=all) from STM32H7 using arduino? Is that possible? I could not find good tutorials for this. Is learning Cube to be able to implement SAI- PDM the only option for this project? I did find the following discussion on arduino forum: https://forum.arduino.cc/t/audio-input-pdm-portenta-vision-shield/1084627 but I wanted to clarify.

Hello,I have a problem using the LL_TIM_ENCODERMODE_X4_TI12 on a nucleo_H743ZI2 development board. I directly read the counter register (TIM2->CNT for example ) to obtain the encoder value. I do however notice that even though the encoder is not rotating the count value in the register fluctuates as for example:Sensor value: 1Sensor value: 0Sensor value: 0Sensor value: 1Sensor value: 1Sensor value: 1Sensor value: 0Sensor value: 0Sensor value: 65535Sensor value: 1Sensor value: 0Sensor value: 65535  This does also happen at the moment that no encoder is connected to the pins and nothing should happen at all. 

Hi,I need to get the RSSI of scanned BLE packet. So I'm using le_advertising_event .I found some one used the following code for that purpose.rssi1 = le_advertising_event->Advertising_Report[0].RSSI;but in the struct they mentioned that /* WARNING: be careful when decoding advertising report as its raw format cannot be mapped on a C structure.     The data and RSSI values could not be directly decoded from the RAM using the data and RSSI field from hci_le_advertising_report_event_rp0 structure.     Instead they must be read by using offsets (please refer to BLE specification).     RSSI = *(uint8_t*) (adv_report_data + le_advertising_event->Advertising_Report[0].Length_Data);     */(So I ran both codes and observed different output values.)If anyone familiar with this activity, Can you tell which one is

Hello st community,I work on stm32h7, and I use with RTC output alarmA, when the MCU power supple turned off, and RTC work with VBATT to wakeup some component with this signal, but this component needs any pules to wakeup and not woke up with first event ('0' to '1' or '1' to '0' )  he needs '0' to '1' and after this to go down '1' to '0' , so i have just the half way by config the alarm polarity to high,  but the SW not working yet to clear this signal, is there any way(some configuration of RTC output alarm) to auto clear RTC_SR_ALRAF flag for the output to go down without the SW?

Hi Everyone!My STM32F401 MCU is a master for communication with an I2C device which requires to write 3 bytes and than read 2 bytes. This cycle repeats each 50 ms. Each cycle includes:Check presence of the slave device using HAL_I2C_IsDeviceReadyWrite 3 bytes with HAL_I2C_Master_Transmit_DMAShort delay for some other operationsCheck presence of the slave device using HAL_I2C_IsDeviceReadyRead 2 bytes using HAL_I2C_Master_Receive_DMAMost of the time every thing works as expected, here is a single cycle:However, randomly (at least I have not seen any pattern) STM generated additional byte transfer in the

STM32G4 reference manual description offers only monitoring "Busy flag (BSY)" to check if SPI transfer is complete.In order to make sure the transfer is over I have to do polling of this bit. It is waste of time and resources.Is there any other reasonable way to detect the end of transfer with interrupt event generation?If I have both TX and RX, I can see the RXed data amount to know the TX is over.But in case of TX only I cannot do anything else, but polling.I believe there should be a solution, but somehow I cannot find it.Please, help.

Hi Everyone, in my previous posts i pretty much beat the bush around this subject and i did get some good supportbut i keep getting stuck with this issue.im using STM32H743ZI2 Evaluation board set to 32Mhzthe ADC is 16 bits and running on "fast channel" so therefore should be 1.2Mhz according to AN5354What i need to accomplish is to sample a large ammount of data (around 1MB, but i can settle for 100kb at this point)at a speed of atleast 1MSPSand store it reliably in internal RAM or some other external Memory device via DMAmy issues are:* RAM is limited and even though im supposed to have 1MB to my disposal i'm only managing to build the code for an array of about 220k half wordsuint16_t adc_buffer[220000]* now even when im using this "small" buffer when using DMA with it im only filling the first 65535 values.and the rest are set to 0, according to the DMA Documentation im limited to 65535 requests.*

There is an inconsistency in RTC shadow register update frequency description. Some places in text mentions that shadow register update happens once every RTCCLK period:34.3.5, 36.3.4: "Every RTCCLK periods, the current calendar value is copied into the shadow registers..."34.3.10, 36.3.8: "The copy is performed every RTCCLK cycle."And other place say that it actually happens every other RTCCLK cycle:34.6.7, 36.6.3: "Calendar values (when reading from RTC_SSR, RTC_TR, and RTC_DR) are taken from the shadow registers, which are updated once every two RTCCLK cycles."I assume that "every two RTCCLK cycles" is correct, because some other Reference Manuals state this consistently.

Hello, i have a problem with my spi communication i don't recieve the information from the slave to the master Master configuration :Slave configuration : 

We don't understand the bit SCUEN of STM32H7. The description is not very clear:   Could you explain what SCUEN means and if the software is supposed to write or read this bit and why ?

Hi,For a project I am using a Wiznet W5500 ethernet chip with STM32F401RET6 MCU to exchange data via HTTP over ethernet with a Windows/OSX software application. The W5500 handles the ethernet communication and speaks to the STM over SPI, which all works well so far.Additionally I would like to implement the possibility to update the MCU firmware over ethernet (via w5500) from my application.It seems that this should be generally possible, but I can't find a lot of information how to get started.Can someone confirm that this can be done?Is there any example code for this particular problem or can someone guide me how to get started with this ?I assume I would need to send the binary and write it into the flash somehow?Thanks,Eve

Hi,Can somebody please explain what the "Flash memory endurance" value in the datasheet means? The max number of overall writes to the flash page or the max number of writes in the particular "cell" inside the page?Simple context:Let's say that the MCU has a page size of 2kB, a write granularity of 8bytes (64 bits, the "cell" - 256 of them in the page), and endurance in the datasheet 10k.The application writes from the beginning of the page toward the end. Reaching the end, rollover happens, the page is erased, and the same cycle repeats.How many application cycles are needed to reach the endurance value from the datasheet, 10k or 10k/256?Best Regards,Krunoslav

I tried to to use SPI2 of STM32F103c8 but unable to intialize . while debugging i got to know that even after intializiation nothing is being written on SPI2 control Registers.

Hi,I'm using STM32F103CBU6TR and I see that the oscillator that connects to osc_in and osc_out is not working.The NRST is ih high, the BOOT0 is low and the power to the device is good.What is the problem?BRShmuel

I've used triple regular simultaneous mode only before(stm32f427zgt6)but now i try this with updated cube mx version, i cannot find itIs it deleted? so now i am trying combined regular simultaneious but it is no