STM32 MCUs Products

Hello there,I'm trying to create a project for stm32h7s7 with external loader. But when i added the external loader in IOC file the all indexes were lost in editor mode. But I checked for building, i can't see any problem. I tried index -> rebuild but it could not help me

Hi everyone,I am bringing up a custom board based on the STM32H743VIT6. I am trying to connect via ST-Link (SWD), but I am getting the standard "Can not connect to target" error in STM32CubeProgrammer.The Setup:MCU: STM32H743VIT6Debugger: ST-LinkInterface: SWD (SWDIO, SWCLK, GND, 3.3V detected)Power Supply: External 3.3V. Board voltage source to provide the necessary power for the system, something that ST-Link alone cannot do.The Problem: After failing to connect, I probed the power pins and found abnormal values:VCAP Pin: I measured 2.7 V on the VCAP pin. As I understand it, VCAP corresponds to the internal LDO output for VCORE and should normally be around 1.2 V. Does a reading of 2.7 V indicate an internal short circuit to VDD or a blown LDO?VDD Drop (Pin 75): On Pin 75 (VDD input), I have a known bad solder connection (trace compromised). I measured 2.3V on this pin.Question: Sin

My STM32H533VE works as PD Sink.We connected CC1/CC2 with DBCC1/DBCC2 (as AN5225), STM32 cannot power up with a USB PD adapter. The adapter supplies power for ~20ms then stops the supplying.If I remove the long time initialization code (LSE initialization), system can boot up and USB PD works fine (PDO can switch).Is this normal? if yes, I may move the LSE initialization later.

Hello,I am using NUCLEO-H755ZI-Q (STM32H755) and I am observing a reproducible boot issue related to high system clock frequency.1. Hardware / EnvironmentBoard: NUCLEO-H755ZI-QMCU: STM32H755Power supply: USB (on-board)Debugger: ST-LINK (Connect under Reset)Supply configuration: LDOToolchain: STM32CubeIDE 1.19.02. Issue DescriptionWhen the system clock is configured to 480 MHz, the board fails to boot after power-on or reset.Flash programming and verification succeedImmediately after reset release, the target becomes unresponsiveST-LINK connection is lost When the same firmware is configured to 400 MHz, the boa

The Errata sheet for STM32G030x6/x8, ES0486 - Rev 6, states in chapter 2.2.9:After connecting the debug interface and until the device power-down, the boot source upon reset or wakeup from a low-power mode is determined by the PA14-BOOT0 pin level before connecting the debug interface (stored by the device), as opposed to the actual PA14-BOOT0 pin level. The device power-up restores the operation of the PA14-BOOT0 pin as direct boot source selector.But this also applies to the empty check: if the debug interface is connected, the empty check is only updated on device power-up (reset is not sufficient).So, if you program an empty device with the STM32CubeIDE in order to debug the software, you need to stop the first debugging session, perform a power cycle and start the next debugging session. Otherwise, the µC will keep executing the bootloader and debugging will fail with “Break at address 0

I designed a board that uses a STM32H750 with a USB3300-EZK that has stopped communicating over USB. It's been having intermittent issues for the last day or so (sometimes I'd need to power cycle the board before it would show up, but then it would work flawlessly). Earlier today, I plugged it into a Raspberry Pi, and then it died fully. I've plugged it into that Pi before without issue.Despite probably hundreds of cycles at this point, I haven't gotten the USB to work again. The PHY is generating a stable 60MHz clock, and DIR is low. I haven't observed any communication on the D0..8 lines. That leads me to believe the problem is with the STM32.I am using pc2_c and pc3_c, which are supposed to work with USB, although I've heard they're more susceptible to (static?) damage.I do have a second board that I can switch to, although I don't have a third prototype, and it really would be good to figure out what happened here so I can prevent it from happening again.

On the STM32N6, half the ram is attached to this NPU RAM on it's own bus.  Are there any downsides to using this ram for non neural net applications. Use case     I would like to use the NPU ram for just frame buffers.   From what i can tell the memory is continues so i could put a memory buffer across potentially 2 different AXISRam sections.   Just asking if i would be able to use DMA operations with the DMA2d or the GPU2.5D engine.  Or if i could DMA peripheral like SPI or LTDC from these buffers Related posthttps://community.st.com/t5/stm32-mcus-products/npu-sram/m-p/808103#M279969 

In our project I use STM32H573VIT6 LDO uC. We have a problem with the PB14 pin. We use 3 pins for LED control (PB10, PB13 and PB14, see photo). The problem with the PB14 is that the LED lights up dimly without code initialization. If PB14 is initialized as Output, Open Drain, No Pullup-Pulldown, it lights up dimly in the OFF state and normally in the ON state. With Output Push-Pull initialization it works normally, i.e. in the OFF state the LED does not light up and in the ON state it lights up normally.  1. What could be the problem? 2. Should I use PB14 at all and is there a potential risk of later problems?

Hi,we are trying to get a 800x800 display to work with the STM32U5G9VJT6Q, using either RGB888 or RGB565 in Video Mode (Burst).According to what we read it is definitely possible. Did we miss something?Could someone please confirm that is definitely possible?Much appreciatedThank you

Hello.How can we enable brown out for this processor and the brown out voltage?Thank you.

Hey all, I have been debugging a nasty issue that I have been having over the last couple of days. I am using the STM32n657I0 MCU. The issue that I observed were random crashes in my code. Luckily the problem was well reproducible. What I observed was that sometimes the ITCM memory was suddenly not accessible anymore, or some data had changed. To make certain that my code was not modifying the ITCM contents I configured the MPU to disallow write operations to the ITCM memory. Also I am not yet using DMA or anything like that, which could write to the ITCM.  After the bug triggers, I cannot read the ITCM memory anymore with the debugger or the processor, all other memories are still working and actually execute, which prints a nice crash log to serial.  When you encounter failing memory or other strange issues you would think maybe the core is unstable. So, I tried to decrease the frequency, which did not change the behavior at all. (I went from 80

I have been working on an IoT project using STMicroelectronics' STM32 microcontrollers, and I have encountered a unique challenge around power management. My system needs to run on minimal power to ensure long battery life in remote applications, but I am facing issues with inconsistent power consumption during sleep modes.Here’s the problem:Despite using the low-power modes like Sleep, Standby, and Stop in STM32, I am seeing unexpected power drain when the device is supposed to be in a low-power state.I have implemented HAL libraries and checked my hardware, but I still get around 10-20mA of current draw when the microcontroller is supposed to be in the Stop mode.Some potential solutions I have considered:Reviewing the clock configurations to ensure the system isn't inadvertently running unnecessary peripherals.Using the dynamic voltage scaling feature, but I'm not sure if I’m configuring it properly.

Hi,I’m trying to read internal temperature sensor on ADC1, but the ADC result is always 4095.I use STM32L471, and I know that the problem is not HW related, when I run a different bin it reads the temp ok.Tried to read VREFINT, raw value is also 4095.Attached below screenshots with clock tree configuration and code.

Hello all  Hardwarestm32h743iitxflash : W25Q256JV sdRam: w9825g6kh lcd : 7 pouces no driver 24bit parrallel I have dev a stm32h743ii pcb with a 7 pouces 24 bit lcd . the basic debug work for the lcd and sdramWhere i am facing problem is on flash W25Q256JV qspi work fine just with 1 line but impossible to make working bank 1 with 4 lines.Can i have some confirmation with the community about :if someone has experiment something please share i going crasy ........

STM32f103In the design guide it recommends to have something switching between vcc and gnd with 10kOhm series resistor, and i need my design to be grounded by default so i may not solder the header even, is it okay if i left the design like fig 1 instead of fig 2, and would it cause issues if i needed to pull it high?

Hi all -    I am building an isolated power converter using a three phase forward converter topology.  Each phase has a half bridge driving a transformer primary w.r.t. Vin/2 (split Vin).  The transformer has a mid-tap secondary, rectified effectively acting like a buck regulator at 2x the primary frequency.  I am using the HRTIM hardware to drive this.So far it works great - I have my three phases A/B/C programmed like so (each has high-side 1, low-side 2):A resets on master update, A1 set on A update, reset on A cmp1, A2 set on A cmp2, reset on A cmp3.B resets on master cmp1, B1 set on master cmp1, reset on B cmp1, B2 set on B cmp2, reset on B cmp3.C resets on master cmp2, C1 set on master cmp2, reset on C cmp1, C2 set on C cmp2, reset on C cmp3.The master cmp1 and cmp2 are set at phase angles 60, 120.  The maset compares and all three cmp2 are fixed, while the cmp1 and cmp3 are all set by the feedback code.&nbs

Hi I'm using STM32G0B0RET6, and im using ADC Channel 1,4,5,6,7,10,11,15, and 16 . and sequencer is set to not fully configurable because if set to fully configurable then i can't use Channel 15 and 16.So here for all ADC channels i'm getting same values, can anyone help me resolve this issueInitiated like this HAL_ADCEx_Calibration_Start(&hadc1);andthis my ADC reading part HAL_ADC_Start(&hadc1);HAL_ADC_PollForConversion(&hadc1, 200);chanel1 = HAL_ADC_GetValue(&hadc1); //MDB 4 Vout sense HAL_ADC_PollForConversion(&hadc1, 200);chanel4 = HAL_ADC_GetValue(&hadc1); //Vcharge sense HAL_ADC_PollForConversion(&hadc1, 200);chanel5 = HAL_ADC

I am using the debugging mode in STM32CubeIDE, and the compilation result shows that there is insufficient RAM.27_Touch_Appli.elf section `.bss' will not fit in region `RAM'region `RAM' overflowed by 94904 bytes 

hello, I have a can bus with 2 node (one STM32G0B1 with SN65HVD1050DR  transcriver and one esp8266 with MCP2515 module) that comunicate over canbus at 1Mbps.I am trying to add a third node, it is a blue pill STM32F103C8T6. The chip onboard looks genuine (i have also tested the usb double buffer on it and it works) but who knows...Transcriver attached to STM32F103 is a SN65HVD1050DR, as for the G0B1.The problem is, whith STM32F103 i see only messages coming from STM32G0B1 (and not from the other node on bus), and it looks like it is not sending messages (other nodes on the bus don't receive also if they are accepting from any id). My ideas are: 1- fake chip, so canbus will never work properly, 2 - bad code.Here are relevant code parts for STM32F103, do you see errors (i am quite new to C programming)?

I am using an STM32H757 for a composite USB device with a ULPI HS PHY. I am streaming video data to the device via an OUT endpoint from the host PC (Windows 11). Streaming can be successful for more than 15 minutes but then the host suddenly stops sending packets. Each individual packet is 512 bytes. A typical sequence captured by a USB analyzer is:    OUT txn        OUT packet (3 B)        DATA1 packet (515 B)        ACK packet (1 B)    OUT txn        OUT packet (3 B)        DATA1 packet (515 B)        ACK packet (1 B)If the device is not ready to receive the packet, then the DATA1 packet is NAKed by the device and the host responds with a PING to see when the device is ready. In this case, the sequence looks like this:    OUT txn (NAK)       

Hi, On STM32G071CBU6, when PB15 is used as CC2 with DBCC2 shorted to CC2, does the ROM bootloader ever drive PB15 as SPI2_MOSI, or does the CC/dead-battery own the CC2 pin and that path always takes priority? This detail is critical for our design because the device is bus-powered and relies on the dead-battery path to manage initial power-up. If the bootloader were to override PB15 and drive it as SPI2_MOSI while the flash is blank, it could cause a power drop when the ROM bootloader starts. I checked the datasheet, reference manual, programming manual, and bootloader manual, and none of them explicitly state how the ROM bootloader handles SPI2_MOSI when that pad is also CC2 with DBCC shorted. Could you please clarify? Thanks

Hi,I am experiencing issues with UART single-wire (half-duplex) communication on an STM32H723. The UART handler reports error code 4 (frame error). I have tried a wide range of configuration settings without success.The same setup works correctly on an STM32F439, but not on the H723. Do you have any suggestions on what I could try or what might be causing this behavior.BR 

I'm currently looking at something like thisSTM32N657A0But they sell a non AI accelerator version STM32N655A0Is there any benefits to using the non AI version of the chip.  Other then saving a few dollars on the chip? 

I'm using ADC with DMA in a large project, and faced some very strange problem: If I'm using DMA2 Channel 6 - ADC works correctly If I'm using DMA2 Channel 1 - the SW end up in Hard Fault 

Dear, I'm using a STM32G0B0RET6 as MCU and I encouter a bug on GPIO external interrupt specifically on PC14. Configuring as external IT on rising edge, it works correctly and the interrupt is generated only on rising edge.Configuring as external IT on falling edge, an interrupt is generated 2 times, 1 on falling edge and 1 on rising but both call the HAL_GPIO_EXTI_Falling_Callback callback.Configuring as external IT on falling and rising edge, an interrupt is generated 3 times (consistent with previous configurations).Configuring this pin (PC14) as external interrupt on falling edge generates a falling interrupt on rising edge.(I precise I checked EXTI registers and they are correctly configured) If I do same tests on PC13, all work correctly. ITs are generated in accordance with the configuration. A workaround is to the check the state of this pin in the interrupt callback but it