STM32 MCUs Products

Hi I have setup a small project in CubeMX v6.17.0 with FSBL and an application (secure domain only). As long as I use the default Flash and RAM region, debugging works fine.  ROM (xrw) : ORIGIN = 0x34000400, LENGTH = 511K RAM (xrw) : ORIGIN = 0x34080000, LENGTH = 1536KIn the future the application will be way bigger (using TouchGFX), therfore I increased the Flash Region to 1.5 MB and the RAM Region will start at 0x34200000 with a length of 1.5 MB as well.  ROM (xrw) : ORIGIN = 0x34000400, LENGTH = 1536K RAM (xrw) : ORIGIN = 0x34200000, LENGTH = 1536KSince I made this change it is not possible to step into the application. FSBL works well and is loading the App data from external Flash into SRAM (0x34000000) as requested. After jumping into the app connection to target is lost as soon as SystemInit funciton is called.

The boot fail light doesn't seem to function the way i would think it would. When* boot 0 == 0* boot 1 == 0* entire external flash == 0xff* using STM32N6-DK The boot fail light never seems to stay on?  My thought is that part of the ROM would read the data from the flash do a CRC on the data and then if it matched then turn the light off.  But it always seems to turn the boot fail led off no matter whats in the flash?

Mostly i have to use my device with battery. So i need to operate it as low-power as possible. When doing this low-power process(either standby-stop-or sleep deeep sleep etc. i have no experience about these modes), one ADC reading is critical for me. I always have to measure that  ADC reading. How should i create the logic? After makins some research, most of peripherals are disabled during standby(i can not verify this if it was true or not). I think that i need a wake-up source to exit standby-stop or sleep modes. How should i configure this wake-up mechanism? Firstly i was plannig to use ADC as an wake-up source but i am not sure if it was true or not? Can you guide me to better options?

Hardware & Setup- MCU: STM32H523RE (I3C target/slave mode) - Controller: STM32H533RE (I3C controller mode)- HAL Version: STM32CubeIDE 1.16.1, HAL for STM32H5- Bus Speed: 3.205 MHz I3C SDR Problem Description We're implementing an I3C target that needs to respond to random address reads with repeated start: [START][ADDR_W][0x01][RESTART][ADDR_R][DATA][STOP] Where:- ADDR_W writes the address byte (0x01) to tell the target which register to read- RESTART signals the repeated start- ADDR_R begins the read phase- Target should respond with data from address 0x01 The problem: Loading the TX FIFO in the RXFNE interrupt handler doesn't work. The hardware transmits stale data before the ISR can fill the TX FIFO with the requested data. 1. RXFNE interrupt fires when address byte (0x01) is received2. ISR starts executing (~1-2µs interrupt latency)3. ISR flushes TX FIFO and writes fresh dat

Device: STM32H7A3LIH6Q (TFBGA225) Tools: STM32CubeProgrammer v2.22, STLINK-V3MINIE, OpenOCD 0.12.0 IDE: STM32CubeIDE / HAL Custom PCB, 4 boards affected identicallySummaryAfter approximately 20 successful flash/debug cycles, all 4 of our custom boards became permanently unreachable via SWD. The MCU continues to run user code normally (UART/VCP output visible), VCAP voltage is nominal, but the ST-LINK cannot connect in any mode. The UART bootloader is functional and we can flash via UART. SWD remains dead even after mass erase with blank flash.Hardware ConfigurationVLXSMPS connected via 2.2µH inductor to VDDLDO and VFBSMPSVCAP decoupling caps presentNRST connected to STLINK-V3MINIEBOOT0 accessible and functionalNo USB connector on board

I am planning to use STM32U083CC series MCU in my project and after inspecting datasheet there is a line "Vddusb should be preferably connected to Vdd when the USB is not used)". I know that Vddusb is independent from Vdd but is it omitted that i can not use Vdd for Vddusb? I mean should i need extra AMS1117 3.3 for instance to feed Vddusb?

I am new to using the STM32H563, 64 pin package and am trying to implement Dallas 1 wire protocol with a UART.Initially I was going to use transmit and receive with diode back into Tx, but I saw example using the Half duplex mode of the UART and thought I would give that a go.However, whenever I change the USART1 pin to open drain (Pin 59 of 64 pin package), the line which is pulled up by a 4k7 resistor drops to about 200mV.  If I try to transmit with the UART, I can see the Open drain pulling from 200mV down to ground as the data goes through. If I place another 4k7 pullup in parallel, the voltage increases to 400mV.If I make the pin an input, the voltage goes up to 3.3V as expected.If I make the pin full duplex standard USART1 TX with PP pin, the voltage goes to 3.3V.I have removed all other components so it is just the processor pin itself, setting Open Drain just fails to give me a proper open drain, it seems to have something else loading

Hi,I am planning to use an STM32N6 in a project where I need a real-time clock (RTC).My goal is to run the RTC with minimal power consumption. As far as I understand, this involves using the V_BAT domain, where the microcontroller is supplied through the dedicated backup supply pins.In my application, only the RTC needs to be running, while the rest of the system should be completely inactive. The main supply voltage will be absent most of the time.According to the datasheet, I end up with a current consumption of about 40.5 µA at 25 °C in this configuration. This seems quite high, especially when targeting a lifetime of around 5 years.Since it appears that only a small portion of this current is actually used by the RTC itself, I am wondering if there are ways to further optimize the configuration to reach something closer to 1 µA or below.I would really appreciate any tips, best practices, or measurement results.Best regards,M

Hi, newbie here - I have some experience with the f4 series, but am working on a small project for which I would like to try a stm32u0 MCU. Looking at the stm32u031 20-pin TSSOP, I am confused by something. When I load this MCU in cubeMX, and tick on I2C 1, I see a single pin 'light up' for both SCL and SDA. The datasheet implies I should be able to choose a pin with an alternate function for one of these, but I can't figure out how I might do this....I see pin PA8 seems to have an alternate mapping to PA9, which seems like it might work for i2cSCL, but I don't know how to select it. I feel like an ***, but I'm unsure how to configure this using cubeMX, or how one is meant to work with these apparently-double-functioned pins? Thanks!

Product: STM32H755ZI (Nucleo-H755ZI-Q, nucleo_h755zi_q/stm32h755xx/m4)Core under test: Cortex-M4 (CM4, CPU2), running at 240 MHz (D2 domain clock)RTOS: Zephyr RTOS (west build system, Zephyr SDK)Toolchain: arm-zephyr-eabi-gcc (Zephyr SDK)I am benchmarking different SRAMs on the CM4 core of the STM32H755 and measuring memory access latency across the available SRAM regions using k_cycle_get_64() (Zephyr cycle counter, backed by DWT CYCCNT). My benchmark allocates identically-sized and identically-aligned buffers in SRAM1 (0x30004000), SRAM2 (0x30020000), and SRAM3 (0x30040000) then performs the same read/write pattern against each.Observation: SRAM2 read access from the CM4 is measurably and reproducibly faster than SRAM1 read access by 1 cycle per 32-bit word, as measured via k_cycle_get_64() (backed by D

We are using MPN: STM32U375VGT6Q in one of our projects, with the internal RC oscillator configured as the core clock source.During board validation, when the system clock was configured to the maximum frequency of 96 MHz, we observed a signal integrity issue. Specifically, the SPI clock signal (96 MHz / 2) does not return properly to the 0V base level,To rule out any PCB trace-related effects, we measured the signal directly at the MCU pin.as attached. Please help us with the necessary resolution for the issue observed.

I'm working with an STM32U3C5RIT6 using the HSP to do some FFT-based audio DSP with the HSP Engine middleware. I've got it working correctly using direct mode and I'm trying to squeeze out a bit more performance using process lists but for some reason the RFFT output isn't the same when used in a process list.Here's the code I use for accelerator / direct mode which works correctly:HSP_ACC_VectMul_f32(&hmw, FFT_Buffer, Window, FFT_Buffer, HSP_BLKSZ); HSP_ACC_Rfft_f32(&hmw, FFT_Buffer, HSP_LOG2NBP_512, 0U, 1U, HSP_RFFT_TYPE_2);I then create a process list using the SEQ versions of the same operations:HSP_SEQ_StartRecordPL(&hmw, PROC_IN); HSP_SEQ_VectMul_f32(&hmw, FFT_Buffer, Window, FFT_Buffer, HSP_BLKSZ, HSP_SEQ_IOTYPE_DEFAULT); HSP_SEQ_Rfft_f32(&hmw, FFT_Buffer, HSP_LOG2NBP_512, 0U, 1U, HSP_RFFT_TYPE_2, HSP_SEQ_IOTYPE_DEFAULT); HSP_SEQ_StopR

Interesting issue I ran into with my STM32F303CBT6. Using an STLINK to try and connect to it and wasn't coming right, probed the voltage on PA14 out of desperation and it worked. Intermittently but it workedStarted testing if it was perhaps acting as a pull down and soldered in some resistors to ground to test. I test 100k, 820k, 1M and 10M. None of which workedI then tested capacitors 3pF up too 22pF and tried combining them with the above resistors. All of which didn't helpI then added 100nF caps between all Vdd and Vss connections as close as I could get to the MCU, as well as between NRST and GND. Again none of which worked. (my boot0 is grounded through a 10k too)  Any ideas of what could possibly have gone wrong here? Such a strange thing to me, that my multimeter was making it work Intermittently. 

Hi I am looking into using STM32F446RCTx for my design, which includes 2 x USB FS 2.0 (1 x Host + 1 x Device). Hence need to provide an external HSE. I want to use an Oscillator, meaning I setup the HSE as "Bypass Clock Source" .With this setup I planned to use the pin 6 (PH1_OSC_OUT) as a GPIO for other functionalities. But the STM32CubeMX setting does not let me do this.I see that this pin will be (OSC_OUT) High Impedance as per RM0390 - Page 120. Am I right in say that I MUST leave this pin NC and cannot free up to use as GPIO?Thanks.  

Hello, We are facing an intermittent CAN-FD issue in the field and would appreciate guidance from the community. Our system has two devices on the bus (no other device on the bus) using a request–response architecture. The master sends a request every 30 ms and the slave responds. This setup is deployed in hundreds of units running continuously (24 hours). Out of these, around 3 to 5 units per day show acknowledgement errors, which we track through the CAN protocol error counters. The behaviour is unusual: • The issue appears randomly on any unit.• No bus-off condition is ever reported.• Despite no bus-off, communication between the two nodes temporarily stops.• Communication recovers automatically after a few seconds without any intervention. Initially, we suspected a physical wiring problem. We re-checked all connectors and even secured them with glue. The bus has 120-ohm termination at both end

System Setup Board: NUCLEO-G0B1RE (STM32G0B1RET6)CAN Transceiver: CAN-FD 4 Click (NCV7344) connected via level shifter (3.3V → 5V)FDCAN Pins: PC4 (TX), PC5 (RX) on FDCAN1Clock: HSI 16 MHz → PLL → 64 MHz FDCAN clock Second Node: Raspberry Pi 4 with MCP2517FD Click board (ATA6563 transceiver, 20 MHz crystal)RPi CAN Interface: can0 configured with bitrate 500000

I am developing a multi-node system (16 nodes) based on the STM32G0C1MET6. During normal operation, all nodes communicate at 500k (Standard CAN). To perform a firmware update, the Master initiates the following transition sequence: Reconfiguration: The Master sends a global command. All nodes switch their FDCAN configuration to 250k (CAN FD) and enter Listen-Only Mode. Trigger: The Master then sends a specific SDO command to a single target node to trigger a jump to the System Bootloader (System Memory). Reflash: Once in Bootloader mode, the target node is expected to respond via FDCAN1 (as per AN2606/AN5405) to begin the reflash process. The Master repeats this node-by-node. The Issue: While most nodes perform the jump and reflash successfully, some specific units enter the bootloader (confirmed by status LEDs) but never respond to CAN messages. These

Hello,I'm working on a projet where I need to drive 4 (or 2 x 4) GPIO at the same time with high speed on the STM32U545RE.I'm trying to use the DualQuad SPI (with OSPI) but I can't have the clock working...At first I tried to write a code with a send only type of frame (with no instruction and no address) but nothing was working.Now I tried to use the example code from a STM32L5 but nothing seem to be working either. Can you if someone already tried to do that ? BR,Loïc

Hi Everyone,I am working on a project with TouchGFX. I'm working with STM32U5G9ZJT6 and I have an external RAM APS12808L-OBM-BA connected via HSPI (Fclk-hspi 100 MHz) in mapped mode. The project is working, but the image animation are not working well. To solve it I have decided to increase the HSPI frecuency.The APS12808L-OBM-BA memory can operate at up to 200MHz. However, when I exceed 118MHz, I can't map the memory. You can see a picture below reading the memory after mapping (you see "?").I have changed the memory read latency (MR0 and MR4) to increase the Fmax.

If the STM32H743IIK6 is clocked by an external 25MHz clock generator, but we still aim for minimum current consumption until a wake-up is required, what is the lowest achievable current draw assuming everything is powered down except for the external oscillator? Thanx,Eli. 

In the last weeks, I was working on running W25Q256 nor flash chip from vendor Winbond with STM32F746 MCU on a custom board. My guideline in this road is ST's how to run QSPI flash video tutorial (5-part video) and of course some genius guys in the community who's helped me a lot to rewrite the functions of QSPI flash (Init, Erase, Write, Memory-mapped). So far functions tested in the Main.c and I can read the pre-written data on the memory. The next step is to generate (.stldr) external loader file and modify Flash.ld file.according to the video tutorial, I added Loader_Src.c, dev_inf.c, and dev_inf.h files to the workspace but there is a little confusion about flash.ld file that contains memory definitions and all other data and text stuff to assign to specific memory (>FLASH, >RAM, >QUADSPI).for the point of concern, I use STM32F746 with IS42S32400F SD-RAM connected with 2-banks to MCU and of-course W25Q256 NOR-FLASH.how to modify flash.ld file

:warning:Note: The internal GPIO structure has been simplified for better conceptual understanding. (Components such as ESD protection diodes, pull-up and pull-down resistors, etc., are not shown.):warning:Warning / Disclaimer This analysis is based on my personal study and interpretation of technical documents. Therefore, I cannot guarantee that it fully represents the actual internal behavior of all STM32 microcontrollers. This is a simplified conceptual model for educational purpose

Hello,I am working on a project where I need to both read and write regularly into the STM32 flash memory. I have some concerns and questions regarding its endurance.First off, I posted a question not long ago about writing to FLASH using ST EEPROM library. I was wondering why upon writing to a variable, it did not effectively write it into flash. This is essentially due to how the library itself works. Hence why I can not really use it to manage flash wearing, because I need the writing to happen precisely when I call a write function due to the fact that my product can be power off at any moment.So going back to the reference manual RM0456, I came upon section 7.3.8 which states:"Each flash memory page can be written and erased 10 000 or 100 000 times. A maximum of32 pages (256 Kbytes) per bank feature this increased endurance of 100 kcycles. This

Hi, I am using two rotary encoders on an STM32U5G9ZJT. Currently I have:- TIM8_CH1 and CH2 available- TIM3_CH3 and CH4 available I know that standard encoder mode uses CH1 and CH2. CubeMX shows options like:- Encoder Mode (with remap CH1/CH2)- Encoder Mode + Index (with remap CH1/CH2 + ETR) My encoders are simple mechanical rotary encoders. Question:Should I use "Encoder Mode with remap" to map CH3/CH4 to CH1/CH2,or is there any benefit to using "Encoder Mode + Index"?   Is there any difference, If I use "TIM8 in encoder mode" or "TIM3 encoder mode from remap" Thanks!

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