STM32 MCUs Products

According to the STM32 datasheet, the maximum clock frequency of TIM6 and TIM17 is shown as 64 MHz, while that of TIM1 to TIM8 is shown as 200 MHz. There is a conflict in the documentation, so please confirm which one is correct. (DS14258 Rev6,page 132)The datasheet indicates that the maximum supported clock frequency of SPI is 100 MHz, but no errors are displayed when configuring 200 MHz in CubeMX. Please confirm the actual maximum clock frequency of SPI.

So on the page https://www.st.com/content/st_com/en/stm32-mcu-product-selector.html i cannoy filter out STM32 products which have higher resolution ADC converters built in, i need high resolution input (>16bits or eq SD) and there is no way to select for that.I had more luck on Digikey parametric selector which is odd (and not as good as manufacturer parametric filter/selector)...Also for web designers, some grayscale shading change between sections, rows, columns would be helpful, dark mode (even Digikey and Wikipedia has that option now)!Any advice in case I'm missing something.

  We are working on a bare-metal application using USBX on an STM32N657X0H3Q device.In CubeMX, we configured USB1_OTG_HS under Connectivity and enabled USBX in Middleware. However, when we execute the following function: static void MX_USB1_OTG_HS_PCD_Init(void) { /* USER CODE BEGIN USB1_OTG_HS_Init 0 */ /* USER CODE END USB1_OTG_HS_Init 0 */ /* USER CODE BEGIN USB1_OTG_HS_Init 1 */ /* USER CODE END USB1_OTG_HS_Init 1 */ hpcd_USB_OTG_HS1.Instance = USB1_OTG_HS; hpcd_USB_OTG_HS1.Init.dev_endpoints = 9; hpcd_USB_OTG_HS1.Init.speed = PCD_SPEED_HIGH; hpcd_USB_OTG_HS1.Init.phy_itface = USB_OTG_HS_EMBEDDED_PHY; hpcd_USB_OTG_HS1.Init.Sof_enable = DISABLE; hpcd_USB_OTG_HS1.Init.low_power_enable = DISABLE; hpcd_USB_OTG_HS1.Init.lpm_enable = DISABLE; hpcd_USB_OTG_HS1.Init.use_dedicated_ep1 = DISABLE; hpcd_USB_OTG_HS1.Init.vbus_sensing_enable = DISABLE; hpcd_USB_OTG_HS1.Init.d

New question = New thread. Split from this post. Hi mƎALLEm, Thanks for the support, I was able to successfully perform UART-based flashing. For the actual use case, I need to flash the STM32F767ZI Nucleo using the CAN interface. I have a PEAK USB-to-CAN converter and an external CAN transceiver and ST-Link V2. According to AN2606 (Table 94), the STM32F767 series supports booting via the CAN2 interface when the appropriate boot pins are configured.

hii am using stm32u585 controller for my project . here i enabled the internal tamper detection using the below code  /* USER CODE BEGIN TAMP_Init 2 */ sAllTamper_inter.IntTamper = RTC_INT_TAMPER_1|RTC_INT_TAMPER_2|RTC_INT_TAMPER_3|RTC_INT_TAMPER_9; sAllTamper_inter.NoErase = RTC_TAMPER_ERASE_BACKUP_ENABLE; sAllTamper_inter.TimeStampOnTamperDetection = RTC_TIMESTAMPONTAMPERDETECTION_ENABLE; if (HAL_RTCEx_SetInternalTamper_IT(&hrtc, &sAllTamper_inter) != HAL_OK) { Error_Handler(); }from the reference manual its mentioned that internal temperature tamper can detect when the temperature range is out of operational temperature and there is no specific data about the tamper triggering temperature range.

Hi all,I'm currently designing a board that requires using an stm32h723 with USB HS (I need more bandwidth than FS allows). The stm32h723 I'm using doesn't expose pc2 or pc3, which are needed for ULPI DIR and NXT respectively. Instead, pc2_c and pc3_c are exposed as pins on the chip. These are internally connected to pc2/pc3 internally with an analog switch, but is this really sufficient for ULPI? The datasheet doesn't seem to be clear.The stm32h747 datasheet does specify using ULPI over pc2_c/pc3_c, which makes me think it's at least been considered. I'm curious why it doesn't seem to be specified in the stm32h723 datasheet (either specifying whether it will or won't work)I did find a few forum posts of people using pc2_c/pc3_c with USB, although it seemed like this had issues (including hardware damage, possibly of the analog switch itself).Thanks!

Hello,   I am very heravily struggling setting up my ADC in continmous conversion mode with HPDMA with multipkle channels.   The DMA seems to stay idle, while the SFRs are saying the ADC is running.   Is there a issue in the config of the ADCs?   /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file adc.c * @brief This file provides code for the configuration * of the ADC instances. ****************************************************************************** * @attention * * Copyright (c) 2025 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * **************************************************

I am designing a compact, low power device using the STM32L433.The device is powered by a 1S battery and I use a buck-boost converter (TPS63070) to generate the 3.3V supply.However, at the moment the buck-boost converter is permantely powered (enable pin permentatly pulled high).I use both shutdown and standby power modes, which use WKUP2 (pin PC13) and RTC to wake the STM32.  But I have just noticed the VBAT pin which could potentially reduce power consumption drastically.  In both shutdown and standby power modes, I use RTC and LSE.However, there are two issues I am not sure how to resolve.1. The WKUP2 pin currently uses the 3.3V from the buck-boost converter (I copied the same circuit used on the Nucleo develpment board).  But if I disable the buck-boost converter then there will be no 3.3V supply to the switch for the WKUP pin, so the STM32 would never wake.  The circuit is shown below..

I have a project in which I try to sync my assembly code on a signal on a GPIO, using WFE for minimum latency and jitter.I use a Rust HAL ony for initialisation of the clock and to put some GPIOs into input mode, and one in output mode that I use to check the timings of my assembly code with an oscilloscope.The synchronization works (PA15 in input mode, using EXTI line 15 to send the wake-up event), but the WFE also wakes up at regular interval. Apparently every second when no debuger is connected, and maybe a bit slower when openocd / gdb is connected.I try to understand why it does wake-up, but really can't find anything. Here are the sources of wake-up I checked:- Interruptions:SEVONPEND is zero (gdb) x/t 0xE000ED10 0xe000ed10: 00000000000000000000000000000000 and if I replace the stack with $AAAAAAAAs, I see no trace of an interruption being called when the core wake

 Hi, The STM32G474CEU6 LQFPN48 was previously used in our projects with a 3.3 V supply, where we successfully operated a 25 MHz FL2500326 crystal using 6.8 pF load capacitors, and the crystal oscillation was stable.In the current design, the same controller is powered at 1.8 V for all VDD, VDDA, and VREF+ pins, while using the same crystal and the same load capacitors. However, under this configuration, the crystal oscillator does not start, and no crystal output is observed.As an alternative, we are currently using HSI clock (16 MHz) as system clock in our application. It is observed in other posts that HSI cannot be used for high speed peripherals like USB and Ethernet due to it's low accuracy, and also it varies with temperature. In our application, we are using 2 - UARTs, 2 - I2Cs and

I created a 10Hz sine function with phase of pi/4, amplitude of 1000, bias of 2000, a sampling rate of 1kHz, and 2048 samples (20 periods in total) and saved it into q15_t input[2048].I created a fft stract by arm_rfft_init_q15(&S, 2048, 0, 0)I entered the input into arm_rfft_q15: arm_rfft_q15(&S, input, output), while output define as q15_t output[4096]I took the input and output and copied them to Python.I used fft in Python on the input data.In addition, I arranged in Python the output of arm_rfft_q15 by calculating the magnitude of the numbers (where each pair of consecutive indexes represents the real and imaginary parts of a number) and then I applied fftshift on the data.The input, and the fft from python and arm_fft_q15 are attached.I don't understand why I do not get the same result from python and from arm_fft. Python's result seems logical (one peak at the oscillation frequency) and arm_fft's r

Hello, we intend to implement a time-dependent channel change via the operational amplifier in voltage follower mode, as described in AN5306 - Rev 1 Page 31, 5.1. However, when checking the output, there is an unwanted gain (x2) on channel 2. Any idea where it comes from or what could be set incorrectly? Switching between channels using a timer and MUX works as expected, but the second channel has a gain of 2, although in voltage follower mode this should not be the case.For testing, 1 volt was connected to both channels and it was expected that 1 volt would come out at the output, despite the change via the MUX, but it changes between 1 volt and 2 volts because the second channel has this unwanted gain. CubeMX Configuration: OPA

Tried running DMA with ADC simultaneously by configuring both in CubeMX, but I am not getting correct ADC values in the buffer. The sin wave from the signal generator is completely distorted. The ADC works individually without the DMA by filling the buffer through interrupts. The DMA is configured in circular mode. I even tried running the sample code of ADCgainCompensation from ST(modified a little to get values in a buffer), but had no success. 

Hello,i have a STM32F114 (Black Pill V3.0) and a strange timer problem. We all know that when setting the APB1 clock divisior is > 1, the APB1 timers gets twice as fast (2x, TIMPRE bit is not set). However, my timers are 4x when the divisor is > 2 (RCC_CFGR_PPRE1_DIV4, RCC_CFGR_PPRE1_DIV8, ...). It doesn't matter if i use HSI, HSE or PLL as sys clock source. My timer interrupt is twice as fast compared to a APB1 divisor of 1 or 2:APB1 divisor = 1: timer interrupt each 0.1 ms (10 KHz)APB1 divisor = 2: timer interrupt each 0.1 msAPB1 divisor = 4: timer interrupt each 0.05 ms (20 KHz)...I checked different frequencies (16 MHz, 48 MHz and 100 MHz sysclock). AHB and APB2 divisors are 1. I used two STM32F114 devices for testing. I double checked everything.

We are using STM32U5G9's I2C with a diff-I2C to single ended I2C converter IC PCA9616. PCA9616 is used to program the STM32 MCU over I2C1 by converting diff-I2C to single ended I2C.However, while probing the I2C1 of the STM32U5G9, we are seeing negative overshoot and level shifting on it. It seems like MCU is taking control of the I2C while in the slave mode. See I2C_SCL_waveform1.pngAlso, we have tried disabling I2C1 of the MCU (by configuring it as a GPIO input only), by doing this we are able to mitigate the negative overshoot problem. I think the problem is with MCU, looks like it is taking control even if it is a SLAVE. See I2C_SCL_waveform2.jpgKindly let us know the exact reason and how to mitigate this issue.

Hello,We are currently using the STM32G070CBT6 microcontroller in one of our data logger devices, which operates on a three-phase power supply and is used in a transformer application. In our design, the microcontroller triggers a relay, and the relay controls a contactor. We are facing an issue where the STM32G070CBT6 is continuously rebooting during normal operation, which is affecting the overall functionality and reliability of the product. For your reference, we have attached the reset circuit schematic used in our design. We kindly request you to review the schematic and help us identify the possible causes of the continuous reboot behavior. Please let us know if any additional information, measurements, or test data are required from our side to assist in the analysis. Thank you for your support.

Hello everyone,I am working with an STM32H7 device using the DSI host interface and would like some clarification regarding supported display resolutions.As per the STM32H7 datasheet, it is mentioned that:“Extended resolutions beyond the DPI standard maximum resolution of 800×480 pixels; the maximum resolution is limited by the available DSI physical link bandwidth.”Based on this statement, I would like to confirm the following:Can a 640×480 display be reliably connected to the STM32H7 using the DSI interface?Are there any practical limitations related to DSI lane count, lane speed, or refresh rate that would prevent using 640×480, even though it is below 800×480?Has anyone successfully driven a 640×480 display (at 60 Hz or other refresh rates) on STM32H7 using DSI + LTDC?Is the limita

 I am trying to source a 12.288MHz clock for an STM32L433 but having difficulties finding something.The clock is required for I2S playback with a bluetooth receiver (BT401).I have tried using the internal MSI RC to generate the 12.288MHz clock for SAI,  but the BT401 is misbehaving so it might be because the MSI RC clock has too much jitter.I was wondering if a ASFL1-12.288MHZ-EC-T would be suitable for the clock source for the SAI external clock input....https://uk.rs-online.com/web/p/crystal-oscillators/2403583Below is the setup...  

Hi Sir,Does any STM32 MCU support two independent USB 2.0 High-Speed (480 Mbps) interfaces simultaneously? I have observed that current H7 parts limit the second core to Full-Speed only. Do any newer series support true dual-HS operation?Thank you.

Hello everyone,I am migrating a design from STM32F446 (UFBGA-144) to STM32H533 (UFBGA-144) and noticed that FMC-SDRAM is no longer supported on the STM32H533.On the STM32F446, the FMC supports SDRAM and provides signals such as SDCLK, SDCKE, and SDNE, allowing the use of external SDRAM devices. On the STM32H533, these SDRAM-related signals and the FMC SDRAM mode are completely absent, and only SRAM/PSRAM/NOR/NAND memories are supported. From the reference manual and datasheet, this appears to be a hardware design choice.Could someone clarify the main reason for this architectural change between STM32F446 and STM32H533, and also for applications that previously relied on SDRAM performance, is OctoSPI PSRAM/HyperRAM considered the recommended alternative on STM32H5? Thank you in advance for your clarification,Best regards,Aymen

I was doing reset through SPI command and expected results are not happening. this is the line i was expecting to reset the MCUSCB->AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1 << NVIC_SYSRESETREQ));where#define NVIC_AIRCR_VECTKEY (0x05FA << 16) #define NVIC_SYSRESETREQ 2also my watchdog is running and expected to reset the system.code snippet FLASH_Unlock(); FLASH_ErasePage(0x08013000); FLASH_ProgramWord(0x08013000, (uint64_t)0x0000000000000000ULL); FLASH_Lock(); FLASH_Unlock(); FLASH_ErasePage(0x08013008); FLASH_Lock(); SCB->AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1 << NVIC_SYSRESETREQ)); __DSB(); while (1);&nb

Since the description of the FDCAN controller in the reference manual ofthe STM32G474 was not detailed enough, I looked around for more Informationand found the Application Note AN5348 ("FDCAN peripheral on STM32 devices ").But that didn't make me feel more confused.- but that didn't answer myquestions, I'm even more confused nowAt the moment I am busy sending CAN messages.According to AN5348, the FDCAN has dedicated Tx buffers and optionallya Tx FIFO or a Tx queue (Figure 4. CAN message RAM mapping.)The FDCAN controller on the STM32G474 seems to be like aminimal implementation of the controller described in the AN5348 -obviously 32 Tx buffers are possible, but the STM32G474 has according to.Reference Manuel only 3 of them. And as I understand I understand, they areused as a TxFIFO or a TX queue - therefore there are no "dedicated" Tx buffer !?Or can I simply use the 3 buf

Hi all,I've been working through this tutorial: How-To-Create  to bring up LWIP + FreeRTOS on the STM32H735IGK development kit. I'm using STM32CubeIDE 1.18.0, FreeRTOS with CMSIS-v1, and STM32Cube FW_H7 version 1.12.1I noticed that pinging is very sporadic, and the STM32 eventually stops replying to ARP requests. I've attached a couple of pictures(wireshark captures) that describe the problem.

I am running the ADC using a timer trigger and DMA to sample a sinusoidal signal.The captured samples are transmitted to a PC via UART.However, as shown in the attached image, the ADC output appears to be step-like and does not capture smoothly changing values, even though the input signal is a clean sine wave.I have checked the external reference voltage, interrupts, and the microcontroller power supply, but the issue still persist

Hi,We are facing the same issue like the below community post. https://community.st.com/t5/stm32-mcus-products/flash-via-i2c-bootloader-problem-for-stm32g0b1kbu6/m-p/636467#M234685 But we are using  'STM32G431RBT6' in our project, kindly let us know if any specific pins need to be handled in this MCU for proper operation.Kindly reply on this as early as possible. Thanks,Ananthu