Automotive MCUs

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Hi all,​Could you check this problem for me? It can not received information from canoe, data(from transceiver) already reached RX pin of SPC5.​The data transmit from Conoe is : ​The source code in Attachment.​I use external OSC is 8M.CanBitRate is 500 kbps.​Thank you very much.

Hello all,When I call this function osalThreadDelayMicroseconds(1u), I found that 1us is not implemented, and the actual result is 1ms.But if you call osalThreadDelayMicroseconds (9000u) it can reach 9ms.The parameter usec is less than 1000 and is 1ms.May I ask why I can't achieve 1us?​I used 1000 for system timer tick number：​​

i am using spc560P50 micorcontoller and writing the bootloader .

.i have compiled adc application from examples, i dont know how to import program to my spc56el70l5-disp kit using spc5-udestk.can any one help me or point me in right direction.

As for SPC56D-Discovery board, refer to page 5 of its application note AN4438, Getting started with SPC56D-Discovery board, it mentioned a test program calling "Test App SPC560D-DIS board.zip�?. Somehow I can't find it on ST's website. Where do I download this file? Thanks.

Below is the code snippet,   RTCModule->RTCC.B.RTCIE = RTC_DISABLE;   RTCModule->RTCC.B.CNTEN = RTC_DISABLE;   RTCModule->RTCC.B.DIV512EN = RTC_DISABLE;   RTCModule->RTCC.B.DIV32EN = RTC_DISABLE;   u32RTCcount = (u32Seconds * 64000) >> 10;   RTCModule->RTCC.B.RTCVAL = u32RTCcount;   RTCModule->RTCC.B.RTCIE = RTC_ENABLE;    RTCModule->RTCC.B.CNTEN = RTC_ENABLE;Here u32Seconds  is 600. After programming this, I expect RTCCNT should set the interrupt after 600 counts. But interrupt is occurring at 517 counts.

Hi,Please find the piece of code, where i'm transmitting a buffer of 255 bytes of data.int main(void) { uint8_t read[255]; uint16_t size; for(i=0;i<255;i++) { read[i]=i+1; } size = sizeof(read)/sizeof(read[0]);   componentsInit();   irqIsrEnable();   sd_lld_start(&SD2, &serial_config_cfg1);   if(sd_lld_write(&SD2,read,size) == SERIAL_MSG_OK) { pal_lld_setpad(PORT_C, PC_LED7); osalThreadDelayMilliseconds(200); } return 0; }My output looks like this. Lot of data are being missed on UART Transmission.01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 4c 64 7c 88 91 9b a4 ae b7 c0 ca d3 dc e7 f0 faAfter 0x42, I'm not receiving continuous stream of data, and much of the data are being missed in vain. Help me in debugging it

I have looked around in the GUI to see if it can be included anywhere, but I am not able to figure out how to do it. I found the example projects which have the FreeRTOS component so I guess it must be possible to do in some way.

I'm having difficulty setting up an SPC560P50L project for CAN. The given example (OS-less CAN) seems to due internal loopback which is not very useful for my application. (pinouts arent even automatically set)I'm using the discovery boardhttps://www.digikey.com/product-detail/en/stmicroelectronics/SPC560P-DISP/497-14706-ND/4866312I need to transmit and receive data at 250Kbps. I was able get transmission working by changing Time quanta (TQ) bits and read it on a PC application and by enabling the PB0 pin. I'm having difficulty receiving data on the RX line. My breakpoints do not trigger for "RX==OK". I've tried variations of disabling bits in the MCR like LPB and

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Hello    I was trying to run Sample Test Code from application wizard into my ECU(SPC560B40L3) but it doesn’t worked out.I’ve attached the snapshot. Could you please help me out into this?

Hi Dear'sI'm currently using the mb96f683 series microcontroller.I want to choose an alternative to the scp family for this microcontroller.Please help me if anyone has any information.

i have compiled adc application from examples, i dont know how to import program to my spc56el70l5-disp kit using spc5-udestk.can any one help me or point me in right direction.

Posted on June 23, 2017 at 14:03Hi everybody,I'm using SPC560P50L5 processor.I need to declare some sram program and data sections. How can i do in spc5 studio?my code consist in different function, and each of this need a particoulare storage address zone and a particoular ram zone.Are there the possibility to create a personal application.id file?Are there a possibility to do that outside application.id file (for example into main.c file)?Thank you very muchNicola#spc5 #memory-sections-ram-linker #memory-sections

Hello,Im searching for a simple solution to flash several prototypes.Since our Lauterbach Debugger has been used for HIL testing there is the need fora 2nd solution.Recently there are two Questions left:1. Is it possible to flash also NXP/Freescale 5604 types using the SPC5-UDESTK oder is this locked ? (We have mixed Yield depending on the REV of the PCB)2. Can I use Trace32 from Lauterbach with the SPC5-UDESTK ?thx in advance.

Hi, ST expertsI added component 'SPC5 FreeRTOS Component RLA' to the applicaion of ‘SPC560BCxx_RLA DSPI Test Application’.Found that MCU can not run, the attachment is the source code, experts help to see, what is the problem?I tried to solve this problem many days and failed.Thank you very much.​Detail of the attachment information:​Board: SPC560BCXX_EVBProduct line: B/C-lineDevice: SPC560B50L1Applicaiton name: SPC560BCxx_RLA DSPI Test Application.

I am facing difficulty while getting hands on SPC5 Studio.

Hello ST Community,Does anyone know which register I can read to find which IRQ triggered an IVOR04 exception, on SPC58?I am using the software vector mode, and the interrupt controller (INTC_IACKR) only gives me the address of the ISR... which is unfortunate when the IRQ is mapped to a generic ISR.Thanks.

Dear All ,SPC5Studio updated components are available (56,57 on 58)more information on http://download.spc5studio.com/SPC58xHxx, Advanced GTM and USBTypeC credentials should be requested on credentials@spc5studio.comNew or updated componentsRLA 1.9.0   DSPI-V2 low level driver for SPC560Pxx, SPC560ELXX, SPC563Mxx and SPC564Axx   BCTU low level driver for Chorus 1M and SPC58ECxx   Lin demo applications for SPC560Pxx and SPC560ELXX   SARADC Allow SARADC configuration with no channel configured for all devices DMA support for SARADC Driver on SPC58ECxx low level driver SPC58xNxx   SWT low level driver for SPC58xExx and SPC58xHxx &

We use SPC560P50L5 in an automotive-qualified battery management system for starter batteries. PIT timer of this device should be able to generate a wake-up interrupt when in low-power mode.At this moment, PIT timer 3 is already working to generate an interrupt at the end of a certain time period. The user manual states that it is possible to use the PIT timer to leave low-power mode (STOP0). But it is unclear which registers are used for that, and how we have to configure them. NOTE: This question and answer originated from a customer support case which was handled by us. We regularly review support cases and add any helpful ones here for all to benefit from.

I am using the SPC5-MCTK-01 ST-PMSM Development Kit.I would like to know if ST offers a MBD toolbox to support model based development in Simulink.​Kind Regards, Rafael

Hi,The demo I use is SPC560BCxx_RLA CAN Test ApplicaiontDebug LOOP Mode is OK.In Normal Mode, when I use can_lld_transmit to send CAN messages, the status returned is always CAN_MSG_WAIT. Can you help me analyze this problem?A preliminary confirmation is that can_lld_is_tx_empty returns FALSE causing the whole problem.The configuration inside Demo is just to remove the FlexCAN Enable LoopBack.​​

Hello,I am bringing up an SPC570S50E1. Using the dev kit I am able to successfully bring up and run some simple code, but I observe a clock division for the clock going into the core.When I route out clockout with a divider of zero and sysclk running from the crystal, I observe a 40 MHz oscillation on the clockout pin. However, when I write assembly code that toggles a GPIO pin every clock cycle, I observe that the clock cycles take 200 ns each, suggesting a 8x clock division happening between the clock stage that the clockout feeds from and the clock stage that the processor core feeds from. (If I run the core from the internal 16 MHz oscillator, I observe the same division behavior). I cannot find any registers or configuration bits in the manual that describe such an 8x clock division. Please let me know if this 8x division is inherent or if there is some way to disable it, so that each clock cycle indeed takes 25 ns. Thank you very