STM32 MCUs Products

Does anybody have an example code how to use SAI in STM32U5A5 as PDM interface?I use STM32U5A5, with LQFP64 package. So, I understand from datasheet: the SAI (I have just SAI1 available om pins), supports PDM interface (for MEMS MICs). My package has just the pins for SAI1_D1, SAI1_CK1 and SAI1_CK2. OK.And I saw, that the _B part for SAI does not support PDM - OK. All "four pairs" of SAI PDM is not possible with my package - OK.Question:Is it important to "group" the signals, e.g. SAI1_D1 with SAI1_CK1 (channel 1 signals)?Or: is it possible to use SAI1_CK2 (which is SAI1_SCK_A on my board), configure it as PDM CLK (bus as channel 2), but use SAI1_D1 (which is SAI1_SD_A) for the PDM MIC data?I mean: would be _CK2 synchronous to _CK1, so that I can use _CK2 but together with _D1?

Hi,everyone! I want to know if FDCAN ( I'm using STM32H7) has lost the automatic Bus-off Recovery mechanism. Looking Forward to get your reply.Thanks!

I have an STM32WB55CGU6 on a custom board with a 32MHz HSE. I'm using low power uart1 with PA2 & PA3 pins. My settings for it are: - baud rate 9600- word length 8 bits- 1  stop bit- parity noneIt won't transmit. Cube doesn't receive it, any terminal doesn't receive it and the pins just remain low all the time. When I tried adding an if clause to test if the result is HAL_OK, the code wouldn't even upload. What's up here, shouldn't be this hard getting basic UART to work.code: uint8_t text[]={0,1,2,3,4,5,6,7,8,9}; /* USER CODE END 2 */

I tried to set up a UART connection from my custom board to my PC but encountered some problems and after a bit of probing, it seems that UART TX and UART RX are connected to GND. Do I need to enable UART somewhere for the ST-LINK ? Also why do some drawings display pins 6 and 4 as GND but some of them display them as UART pins?  

I'm trying to send a fixed length packet in SPI slave mode from the STM32 via DMA. The SPI master may send/recv longer than that fixed length packet. It would be nice if the STM32 just sends 0 one the transactions is complete, but it seems to want to send 0x02 or 0x80. I'm wondering where this is coming from and if there are any ways to get it to send 0. init_struct_.txDmaChannel->CCR &= ~DMA_CCR_EN; init_struct_.txDmaChannel->CNDTR = descriptor.length; init_struct_.txDmaChannel->CMAR = (uint32_t)descriptor.txBuffer; init_struct_.txDmaChannel->CCR |= DMA_CCR_EN;dma configuration init_struct_.txDmaChannel->CPAR = (uint32_t)&init_struct_.spi->DR; init_struct_.txDmaChannel->CNDTR = 0; init_struct_.txDmaChannel->CCR = DMA_CCR_DIR | DMA_CCR_MINC; init_struct_.txDmaMuxChannel->CCR = init_struct_.txDmaMuxId;

The application note AN2834  (https://www.st.com/content/ccc/resource/technical/document/application_note/group0/3f/4c/a4/82/bd/63/4e/92/CD00211314/files/CD00211314.pdf/jcr:content/translations/en.CD00211314.pdf  page 36)  mentions a "SAR ADC sampling estimation tool" that is "available upon request". I am new to the ST developer community and was wondering how can I request and obtain this tool? Thank you in advance,--Stefanos

JW

I am a bit confused by the documentation on oversampling and the required trigger rate.  I'd like to do 2 conversions a second on 5 channels using 256x oversampling.  I have the ADC in continuous mode. I am triggering off TIM3 update.  It's not clear to me if I trigger once every half second to get all 256 conversions on all 5 channels or if I have to trigger 256 times each half second.  If there is only one trigger, does the first channel get sampled 256 times and then the second 256 time until the fifth channel? Thanks. 

Hi Community,I am using the controller , STM32L072CZT6. I am currently working on Fota functionality .I am downloading a binary file from ftp server and I need a crc verfication for the downloaded data. I am using the default CRC settings in the .ioc file.The polynoimial is 0x04c11db7Init value is defaultI couldn't find a tool that could generate the crc with this polynomial. Please let me know if there is any tool available like JFlash (which uses a diffrent polynomial 0xebd88320). I am currently trying to generate the crc for using it with Jflash:The document states that:a. Everything that is not covered by the data file (gaps in the data file, unused sectorsetc.) which is opened, is assumed as 0xFF during the CRC calculation. (Is this the init value ?)b. The polynomial which is used for the CRC calculation is 0xEDB88320.These are the .ioc configurations wrt Jflash Please let me know if the init value provided is correct or no

Hi to everybody.I'm using H5 and FREE RTOS. I'm porting a project from M3 , than M4 now to H5. I used LL for all the periferals, but moving to HAL isn't a probelm (... but I prefer  LL!).On M3 and M4 I used a timers to "serve" the RTOS scheduler, then SysTick for a simple delay (yes, also on a task!). E.G. when I need few milliseconds between toggling a output while driving the display.With H5 I can't use something like "LL_mDelay(100);" because it stuck.How I can enable systick with H5 (voa MSX CUBE) the LL_mDelay (or HAL_Delay) to measure a time, or simply get a systick?Thanks in advance. 

What is right? 7 or 8 bits?

JW

Hello community! I am developing an app that is running in an H7 MCU, the M7 core app is "turning on" the M4 and then is running to an external flash where is the actual M7 code.I am looking to implement an update in this M7 "bootloader". As i understand, before "turning on" the M4, i can interact with the flash region where the M4 has its code to run, so my idea is in the M7 bootloader to start an USB port to detect an USB disk and if there is a .bin file for each core, to write the M7 in the external ram (using a code similar to the developed external loader for example?) and for the M4, just a write in the M4 memory location? I look forward for your commends dear community :) Thanks!

Hello, I'm studing I2C on stm32g071rb and I have a question about it.In the datasheet there is this line: "In the case of a write transfer, the TXIS flag is set after each byte transmission, after the 9th SCL pulse when an ACK is received", but for the last byte TXIS remain LOW and TC become HIGH.It's correct that for the last byte that I have to send via I2C, the TXIS bit remain LOW?For example if I have to send(master to slave): 0x00, 0x01, 0x02I set the CR2_NBYTES bit (3 << I2C_CR2_NBYTES_Pos)...etcBut after send the 0x02 byte, only TC is HIGH...so also the TXIS bit should be HIGH in this case?Thanks Simeon

Hello,I'm using ADC together with DMA.At first start of ADC and DMA all worked like expected.At 2nd and following starts, the first value received from DMA is always zero / invalid.Now I have found out that it works if between two DMA transfers I useLL_ADC_Disable(ADC2);and afterwardsLL_ADC_Enable(ADC2);//code snippet:LL_DMA_SetDataLength(DMA2, LL_DMA_CHANNEL_1, 100U);LL_DMA_EnableChannel(DMA2, LL_DMA_CHANNEL_1);LL_ADC_REG_StartConversion(ADC2);while (LL_DMA_GetDataLength(DMA2, LL_DMA_CHANNEL_1) > 0U){}LL_ADC_REG_StopConversion(ADC2);LL_DMA_DisableChannel(DMA2, LL_DMA_CHANNEL_1);LL_ADC_Disable(ADC2);while(LL_ADC_IsDisableOngoing(ADC2)){}LL_ADC_Enable(ADC2); Now my questions:Is disable/enable of the ADC absolutely necessary?

Hi All,I have a peculiar observation in one of our legacy codes, wherein I do not observe RX FIFO 1 callback being triggered.I observe hfdcan1.Init.ExtFiltersNbr is set to 0 and HAL_FDCAN_ConfigFilter() is NOT called. I am unaware if this is purposely done to use all available filters.It also appears to me that the way the CAN driver is set-up / Initalized, microcontroller is accepting all CAN messages in FIFO 0 even when a line of code is added in initialization to enable the bit 4 (i.e., FDCAN_IE_RF1NE) of CAN IE register. static void MX_FDCAN1_Init(void) { /* USER CODE BEGIN FDCAN1_Init 0 */ /* USER CODE END FDCAN1_Init 0 */ /* USER CODE BEGIN FDCAN1_Init 1 */ /* USER CODE END FDCAN1_Init 1 */ hfdcan1.Instance = FDCAN1; hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC; hfdcan1.Init.Mode = FDCAN_MODE_NORMAL; hfdcan1.Init.A

Hello,I'm having an issue while programming a small section of FLASH memory during runtime of my device.Our device executes its program from FLASH memory. In-addition, we reconfigured the systick timer to run at 20kHz and this is the heartbeat of our program. Every 1/20kHz secs, the device reads the user input and then updates some signal outputs.Occasionally we need to save state so that we can recall certain settings in-case of a loss of power. To do this, we set a flag and then in the main while() loop we initiate a write to flash memory. We only need to write 64 bytes and we do it using a wear-leveling technique. I was expecting this to happen seamlessly in the background but I was surprised to find that it interrupts the flow of the systick code (even though this is a high priority interrupt). This results in a glitch in the user interface that is noticeable in certain scenarios.I've used a pair of GPIO pins to show what happens:

Hi, I'm trying to write an algorithm to load into external memory in QSPI_Dual_mode MT25QL512A for KEIL. I followed this instruction. The algorithm works BUT! when the firmware exceeds 90040001H an error occurs during verification. Smaller programs are  flashed and work fine.Project algorithm  Programming External Flash with STM32 Devices  

The configuration of Cubemx is as followsThe configured address is the address of SRAM1-3，given this configuration, why does "Strongly ordered memory" cause a HardFault Thanks. 

Could someone clarify if the Nucleo-F334R8 boards can operate two interleaved channels with using peak current mode control, each channel would need its own slope compensation.  I understand the board can do a single phase and has 3 DACs, but I see it has only one internal op-amp.  I'm still on the steep part fo the learning curve here. We're stepping up from simpler analog voltage mode control and I'd really like to insure this board by itself will do that job or if we need a more powerful board to do both channels with one controller.  -- Thanks

I am using `HAL_SPI_Transmit_IT()` API to transmits 6 frames. The TXP interrupt correctly fires and feeds the TXDR register however after feeding the last frame into TXDR the EOT never fires, actually no interrupt fire after the last frame is feed.Frame Size: 9 bitsFiFo threshold: 1 All the interrupts that were enabled remain enabled including the EOT. (EIR=0x328)TSIZE: 6 (does not change)SCLK: 125KHzSource CLK to SPI: HSI (16MHzPrescaler: 128The system clock is running 160MHzIt's worth noting polling mode also failed because EOT isn't being set either.In other drivers we use HAL_SPI_Receive_DMA() and it works as expected. I reviewed  the STHAL driver but I do not see anything obvious wrong.What criteria, besides TSIZE, triggers the hardware to set the EOT flag?

Hello STM32 community,I'm facing an issue with my STM32L562VE MCU where I'm not receiving SPI clock signals whenever I attempt to transmit or receive data.Here are the specifics of my setup:MCU: STM32L562VESPI Mode: 0Data Word Length: 8 bitsMain Clock Frequency: 80MHzSPI Clock Frequency (after prescaler of 2): 40MHzMCU is connected to two crystals:LSE (Low-Speed External) crystal: 32kHzHSE (High-Speed External) crystal: 48MHzClock Source Used: MSI only (despite having LSE and HSE crystals)I've also uploaded the .ico file and other related files for reference.Despite these configurations, I'm not receiving the expected SPI clock signals. I've checked my connections and configurations, but I haven't been able to identify the root cause of the issue.Has anyone in the community encountered a similar problem with SPI clock signals on the STM32L562VE MCU? Any insights, suggestions, or solutions would

Hi, I have a problem with a module based on STM32, more precisely it is a module that collects data from the ebike, i.e. temperature, speed, etc. This system is powered by an external 12 V converter, which reduces the voltage from approximately 80 V (20S battery). This converter is a ready-made module from Aliexpress. Coming back to my module, I don't know why, but after a few turn on/off cycles, the module stops working and burns out the STM. I have two linear stabilizers in the module, which respectively reduce the voltage to 5 V and 3.3 V. Is it possible that during startup (applying voltage to my module) voltage spikes appear somewhere, which burn the STM? I added the project schematics.

Hi! I'm trying to use the following function:HAL_UARTEx_ReceiveToIdle_IT(&hlpuart1, lpuartRXbuffer, 64);I've seen a few example codes using it but otherwise google shows nothing when I search for it. I think I should get some callback but I cannot figure what should it be. I tried the following: void HAL_UARTEx_RxEventCalllback(UART_HandleTypeDef *huart, uint16_t Size) {   }But there is no response.I'm new to the STM32 software environment, coming from Arduino and Atmel so any advice where to find such information helps a lot.

Posted on December 20, 2015 at 20:58Someone knows how to implement a circular buffer with HAL Drivers F1?